ResourceXplorer

Find our technical papers, webinars, articles

The ResourceXplorer enables you to access technical papers, webinars and articles related to analog/mixed-signal semiconductor technologies.



313 entries found



Modern medical applications rely on semiconductor technologies to build reliable, accurate and innovative devices. If you want to find out what types of technologies X-FAB provides and for which type of devices they can be used, then watch this webinar session covering the following topics:

  • Feature-rich CMOS technologies for personal medical devices
  • BCD-on-SOI technology for medical ultrasound probes Optical sensors for medical imaging applications
  • Silicon-based microfluidics for next-generation DNA sequencing, liquid biopsy or micro electrode arrays
  • Single-Photon Avalanche Diodes (SPAD) for life-science applications

Presenter:
Christine Dufour, Program Manager Microfluidics
Alexander Zimmer, Principal Engineer Process Development
Dr. Ulrich Bretthauer, Marketing Manager Medical

The advent of the Internet-of-Things brings new challenges in circuit design. The presence of circuits and sensors in harsh environments brought the need for methodologies that account for them. Since the beginning of the transistors, the temperature is known for having a significant impact on performance, and even though very low temperature sensitivity circuits have been proposed, no general methodology for designing them exists. This paper proposes an extension of the methodology presented in [15], generalizing the gm/ID technique for designing temperature-aware circuits that can
be used either on measurement data, analytically, or based on simulation models. This model is validated using measurements up to 250°C of X-FAB XT018 transistors and later with a Voltage-Controlled Oscillator circuit design example.

For an IC to function reliably in the long-term, you need to be able to predict how a circuit is going to perform after a significant time in operation. Complementing silicon qualification, aging simulations come in handy to estimate the behavior in advance, to fulfill ISO 26262 requirements with regards to functional safety but also to help debug issues identified after reliability stress.
In this webinar, you will learn about the basics of reliability physics and the typical mechanisms that are responsible for transistor aging. The main influencing factors for device degradation will be described and options for limiting them will be discussed.
The presentation will also cover the flow for performing aging simulations in the Cadence design environment, providing examples that illustrate aging impact on circuits and how aging simulation can be used to uncover it.
In addition, the possibilities and limitations of aging simulation are highlighted and suggestions of usage in the day-to-day work of circuit designers are provided along with an overview of current aging model availability in X-FAB’s 180 nm processes and an outlook on upcoming models.

Whether you want to get a general overview of X-FAB’s large NVM portfolio, or already know the specific functionality, operating conditions and reliability requirements for your project, X-FAB provides an exhaustive and straightforward way to access relevant information.

This short video introduces the available tools for the quick access to helpful information about X-FAB’s NVM portfolio.

At X-FAB, we put great emphasis on reliability: all our technology platforms must comply with the tough requirements of the automotive industry, and our embedded NVM are no exception to that.

The whole test process for embedded NVM IP, from Design for Test (DFT) to qualification and production screening must be designed upfront and carefully executed to fulfill the automotive quality requirements.

This presentation provides a first overview and some key examples about the challenges and specific approaches in ensuring best-in-class quality for every single NVM IP from X-FAB and how customers can benefit from it.

Electronic design depends critically on the quality of the PDK - PDK verification becomes more and more important. 


With each semiconductor generation more functionality is integrated 

  • Potential sources of failures are increasing

PDK verification increases the chance of first time right

  • Validates the PDK functionality and integrity
  • Improves the PDK quality, guarantee the trustworthiness of design 

Easily adopted for all XFAB technologies.
 

Calculation of effective lifetimes based on mission profiles is necessary. Very complex and a lot of manual work necessary with lifetime data from reliability specification.
Reliability Explorer “RelXplorer”
• models from reliability specification are the basis
• models include same safety margin as specification
• considers degradation mechanisms simultaneously
• calculates effective lifetimes based on Mission Profiles

The pace of development and industrialization of LOC devices has been growing – and will further accelerate. Smart integrated microfluidic systems are a key tool to tackle the future opportunities and challenges of digital healthcare. The COVID-19 pandemic being an enormous catalyst to disseminate digital healthcare. Serving a diversified portfolio and a strong customer base ensure steady growth. Technology standardization is the basis for a scalable business model.


Let´s transform the up coming challenges into opportunities together.

X-FAB offers for his foundry portfolio Avalanche Photodiodes and Single Photon Avalanche Diode devices for various application
Especially in the field of fluorescence detection a close collaboration with IMMS exists

  • Optimization with respect to the boundary conditions will be elaborated
  • Adjustment of primitive devices for the system optimization
  • Measurement capability for the timing jitter to enable the SPADs for different fluorophores 

The integration of the devices will be supported with different possibilities

  • XH018 optical evaluation chip
  • Application evaluation kit
  • SPAD design library
     

Abstract—We present in this study a novel way to determine the three-dimensional (3D) temperature field of a Radio Frequency Silicon On Insulator (RF SOI) electronic chip, using several resistance temperature detectors (RTDs) embedded at different locations of the chip. The RTDs are designed and placed at different locations to experimentally obtain the temperature at key locations of the chip enabling the calibration of a multiphysical numerical model that provides the 3D temperature field in the whole chip under operating conditions. The obtained results provide useful insights on the role of different parameters (e.g. used materials properties, heat source power, substrate, boundary conditions, etc.) to engineers interested in the modelling and optimization of heat transport and thermal management of electronic chips for RF applications.