Deep trench isolation (DTI) is widely used in high voltage BCD technologies in SOI due to its great area shrinkage and excellent isolation capability. X-FAB has utilized the benefits of DTI which enables broad portfolio of highly modular high voltage solution in XT018 [1] [2] and XT011 technology node for automotive applications. The DTI is used for device termination and isolation between adjacent device in circuit to prevent parasitic channel formation, which shown in Fig. 1. As the DTI process integration is rather complex and challenging, the process needs to be well-optimized and robust enough to achieve sustainable manufacturability. This work describes the improvement of defectivity, electrical, yield, as well as reliability performance realized by DTI process optimization.

Analog primitive development and advancing are essential to provide a competitive technology portfolio while complimenting the CMOS digital part, HV, NVM offer for various product application. A variety of analog primitives have been designed and offered in X-FAB XT018 BCD on SOI technology [1] [2] since its production release. These devices are popular and widely used in customer product designs. This paper has summarised the past development and possible future advancing works for different analog primitives of this technology.

The sheet resistance of poly resistors has been investigated with the design split of metal shielding to resistor body, which is metal level split, shielding metal extension size split to resistor body, metal shielding ratio to a poly resistor in 0.18um CMOS process. Based on the evaluation results, we found that we can control the sheet resistance of poly resistors by metal shielding design which enabled us to have a scalable polysilicon resistor with different polysilicon sheet resistance with the same dimensions without any process change or addition. Therefore, the chip designer will be able to control the polysilicon sheet resistance considering the available design area for the resistor. Finally, it will be helpful to minimize the chip size which will lead to a cost-effective design.

The combination of analog/mixed-signal, high-voltage and embedded non-volatile memory options with sensor and actuator integration is still common in automotive, industrial, communication and medical applications. MEMS with or without integrated CMOS, 3D integration micro transfer printing and integrated microfluid systems are in use to realize such applications. The established top metal interconnect materials for analog/mixed-signal CMOS applications are thick Aluminum (AlCu with Titan and Titanium Nitride) and thick Copper. Integrated noble metal electrodes are necessary for MEMS applications like microfluidics. The reliability requirements of a CMOS/ MEMS process differs from a long storage shelf life at room temperature, long life time for medical (in-body) or space applications up to high operating conditions for automotive and industrial applications like oil drilling. Applications, like functional surfaces, combine integrated circuits for example for next generation DNA sequencing. The noble metals for electrodes on top are thinner for such applications. An additional reliability challenge for such a lab on a chip is corrosion.

Abstract—This paper, presents a physically-based matching model that includes mismatch fluctuations in HiSIM_HV MOSFET model. Analytical expressions of the variation associated to the threshold voltage, current factor, and drift region resistor were developed and added to the compact model. The proposed model predicts accurately the mismatch in the drain current over a wide operating range and uses only three model parameters. This was validated through Monte Carlo simulations compared to experimental measurements on several device classes from X-FAB 0.18 um processes. The results of the drain current mismatch, the standard deviation of threshold voltage, and the standard deviation of the current factor are presented here and show good agreement between measurements and simulations.

Abstract —Lateral Schottky barrier diodes were implemented in a thin body RF-SOI platform with CoSi2.  Both n-type and p-type device constructions were explored with various geometries and configurations.  Devices were modeled with TCAD, characterized, and their respective performance assessed.  In a demonstration in the targeted application as a zero bias detector, results of output voltage sensitivity to RF input power levels between –20 to 0dBm at frequencies up to 30 GHz are supportive to achieving mmW integrated circuits. 

Keywords — Schottky barrier diode, integrated, RF-SOI, zero bias detector, mmW

Abstract
This paper provides a concise overview of X-FAB and the power electronics markets, with a specific focus on the wide bandgap semiconductors Silicon Carbide (SiC) and Gallium Nitride (GaN). The potential advantages of using power electronics for achieving carbon neutrality will also be discussed. Additionally, the challenges associated with integrating SiC and GaN into a CMOS manufacturing process will be presented. Finally, the paper concludes by offering an outlook on X-FAB's technology strategy for power electronics.