ResourceXplorer

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The ResourceXplorer enables you to access technical papers, webinars and articles related to analog/mixed-signal semiconductor technologies.

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294 entries found



Be aware of the avalanche! Are you planning to integrate Avalanche Photodiodes (APD) or Single Photon Avalanche Diodes (SPAD) into your next IC design? If yes, you should watch this webinar replay. It will cover X-FAB's new APD/SPAD devices which come with a high photon detection probability of up to 18% for 850 nm wavelength and a low dark count rate. You will also learn about the integrated trigger diode which allows precise, real-time on-chip breakdown voltage detection without an external light source.

X-FAB has been providing photodiodes for more than 20 years. In this webinar we are proud to introduce our new core process optimized for photodiodes. This has been developed based on the feedback and requests from you - our customers. The technology comes with a number of photodiodes with outstanding performance for UV, ambient and near-infrared light. It also offers a range of other devices to enable fully integrated low-noise sensor designs.

(Webinar is presented in Mandarin)

More complex designs, shorter time to market and less time for engineering – these are the challenges IC designers are facing today. X-FAB will be addressing these topics to assist you in your design process and to support you to achieve First-Time-Right designs.

- Micro-Transfer-Printing (µTP) was introduced as a new and promising technology for 3D- and heterogeneous integration.
- The main advantage of µTP is the parallel placement of up to thousands of small chiplets with a very high printing accuracy.

Partial SOI (PSOI) is revisited as a suitable High Voltage (HV) architecture for Power Integrated Circuits (PICs). The added process complexity compared to SOI RESURF is offset by the better heat conduction due to thinner BOX, the wider voltage range capability and the reduced parasitic capacitance to the Handle Wafer (HW). The new proposed platform technology is therefore particularly relevant to the manufacturing of high voltage integrated circuits (HVICs) where low Ron, fast switching and reduced self-heating are essential. This work reports on the extension of a 200V PSOI process to 400V while providing competitive Ron and low HCI degradation. 

As the world's leading foundry group for analog/mixed-signal semiconductor applications X-FAB creates a clear alternative to typical foundry services by combining solid, specialized expertise in advanced analog and mixed-signal process technologies with excellent service, a high level of responsiveness and first-class technical support.

In this work we demonstrate application of Al/Ge eutectic vacuum packaging of a CMOS/MEMS wafer to a Cap wafer for infrared sensors. Optimum Al/Ge integration and bonding procedure result into noticeable enhancement of thermopile-pixel responsivity. In addition, critical parameters along process variation, which can be beneficial to other types of CMOS/MEMS devices with variable process integration approaches, are discussed. 

Abstract This contribution investigates the suitability of chip-level tests for the mechanical characterization of thin films in a mass production environment. The parameters of intrest are the Young´s modulus, the residual mechanical stress as well as its gradient along the film thickness and the critical fracture stress. For the measurement of these parameters the electrical measurement equipment for end of line testing in CMOS industries is used.

Polysilicon is an integral part of many devices in all CMOS process. Very consistent and accurate electrical performance of such material is a need of those devices used in Circuit Under Pad (CUP) applications. This paper presents an investigation on stress impact of probe insertions on two bond pad metal options i.e. METMID and METTHK on a polysilicon resistor placed under the bond pad. Probing results in residual stress on both Back End Of Line (BEOL) as well as Front End Of Line (FEOL) structures. This residual stress would impact the electrical properties of the polysilicon material used in such devices. In this study, such electrical impact is measured in terms of change in resistance of a polysilicon resistor which was placed underneath the bond pads.