A Compact-Area Digital-Output CMOS Test Module for Random Telegraph Noise Characterization

Abstract - This work presents a CMOS test module for the characterization of random telegraph noise (RTN) that can be integrated into regular scribe lines. The proposed module incorporates a novel low
noise current-mode IAF ADC and a standard I2C digital backend for addressing and reading each DUT. A set of 1024-DUT modules has been integrated in the 0.18µm Modular Mixed-Signal HV CMOS technology from X-FAB (XH018). Preliminary experimental results are presented in terms of RTN patterns, spectra, power distributions, spatial mappings for two NMOS transistor types and sizes. The test module can be used to investigate RTN bias dependencies and, with minimal modifications, to speed up testing through RTN subsampling techniques.