Analog primitive development and advancing are essential to provide a competitive technology portfolio while complimenting the CMOS digital part, HV, NVM offer for various product application. A variety of analog primitives have been designed and offered in X-FAB XT018 BCD on SOI technology [1] [2] since its production release. These devices are popular and widely used in customer product designs. This paper has summarised the past development and possible future advancing works for different analog primitives of this technology.

The sheet resistance of poly resistors has been investigated with the design split of metal shielding to resistor body, which is metal level split, shielding metal extension size split to resistor body, metal shielding ratio to a poly resistor in 0.18um CMOS process. Based on the evaluation results, we found that we can control the sheet resistance of poly resistors by metal shielding design which enabled us to have a scalable polysilicon resistor with different polysilicon sheet resistance with the same dimensions without any process change or addition. Therefore, the chip designer will be able to control the polysilicon sheet resistance considering the available design area for the resistor. Finally, it will be helpful to minimize the chip size which will lead to a cost-effective design.

The optimization of a metal-Schottky source-drain NMOS structure and it’s underlying parasitic lateral BJT has been performed on a 0.18 um feature size BCD power IC process. The metal-Schottky structure is fabricated using an ultra-shallow ion implantation which is capable of modifying the barrier height without the need for introduction of non-standard metal systems into the CMOS fab.

Negative Bias Temperature Instability (NBTI) had become one of the most significant device reliability subject reported in this day and age. Not only does NBTI impose a big impact on circuit functionalities as well as product lifetimes, but also becoming the prominent limiting factor for further CMOS technology scaling. Hence accurate characterization and thorough understanding of NBTI is essential to follow or go beyond the Moore’s Law. Nonetheless the existence of NBTI recovery becomes a huge obstruction to this effort; whereby fast reduction in the degradation of the device parameter occurs after end of electrical stress. Moreover device characterization within the measurement stage further increases the NBTI recovery corresponding to the increase in delay.

A tunable optical prism MOEMS based on the deformation of a liquid droplet is presented. An aluminum-nitride membrane is tilted by a novel type of thermo-mechanical actuator. The actuatio nprinciple is based on a thermo-mechanical modulation of the intrinsic stress in aluminum-nitride beams. Based on an analytical model, the key parameters of the actuator are optimized.

Bond pad quality and reliability evaluation is part of important structure test for wafer fabrication. In order to ensure production consistency, and part of continuous monitoring, as well as new process qualification, bond pad evaluation through wire bond is required. Usually the test was conducted by proceed through standard IC packaging such as wafer saw, die attach and wire bond to simulate actual mass production environment. Optionally this can also be done by using wafer level wire bond. Main advantage of wafer level wire bond is shorter test cycle as compare to conventional package level bonding. This could be a significant time saving especially in the fast pace semiconductor field. Key concern of wafer level bonding is the correlation of bonding performance as compare to real application in the field.

Sensor interfacing is a crucial component for today’s systems in many application domains. Especially in automotive and manufacturing fields, high temperatures are encountered. For extracting the typically small sensor signals, an interface near the sensor is needed to provide a high-accuracy and robustness.