Micro-Transfer-Printing – a Wafer-Level Integration Technology for Advanced System Solutions in Semiconductor Wafer Foundry

Published: Oct 2022

Over the past years the semiconductor ecosystem has experienced an ever-increasing demand in wafer level integration and packaging technologies, driven by increased requirements on functionality, performance and efficiency. To support the increasing demand for advanced packaging capabilities X-FAB is offering 3D integration and wafer-level packaging methods to enable solutions for advanced system including analog mixed-signal ASICs, sensors, and MEMS. One particular technology out of this variety is the so called “micro-transfer-printing” (μTP) which enables an integration of small-scale devices – also referred to as chiplets – taken from a source and placed on a target wafer in a massively parallel way by applying an elastomeric stamp. Due to its numerous benefits for instance high throughput, integration of small and thin devices, high placement accuracy and short metallization tracks, μTP is regarded as an auspicious technology to support various System in Package (SiP) solutions. To offer this versatile technology, X-FAB has set-up a μTP pilot line for the development and industrialization of related processes in the MEMS clean room facilities in Erfurt, Germany. One focus of X-FAB is the development of print-ready SOI based CMOS ASICs. Print-ready refers thereby to a state in which the ASIC has been separated from the handle wafer and is solely carried by tether, a mechanical structure that keeps the device in place. The general process flow to make devices “print-ready” involves therefore, the chiplet singulation, the tether formation and the release etch.

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