IP Portal

The intellectual partner network

The intellectual partner (IP) portal is a web database provided by X-FAB in cooperation with selected partners. Both X-FAB and a variety of different IP supplier offer their IP to customers using X-FAB’s foundry process. We will support customers to get in direct contact with the relevant IP supplier.

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760 entries found



Geometry Process Supply Voltage IP Category Deliverable Description IP Provider
350 nm
XH035
3.3V
Current / Voltage Reference
IP name: D17IP11 Current and voltage reference with trimming. The current reference uses a negative TC resistor and VBE to reduce the temperature dependence. Desert Microtechnology
350 nm
XH035
3.3V
Other
IP name: D17IP12 3rd order analog filter for video applications with Tow-Thomas biquad architecture Desert Microtechnology
350 nm
XH035
3.3V
Driver
IP name: D17IP13 Video amplifier designed to drive 75 ohm coaxial cable. Desert Microtechnology
350 nm
XH035
3.3V
Other
IP name: D17IP14 Low voltage differential signal (LVDS) receiver (RX) for digital video data transfer. Desert Microtechnology
All Geometries
All Processes

Security
IP name: Digital Sensor Digital Sensor detect threats of the family of Fault Injection Attacks like Input clock frequency, input voltage, and temperature, Secure-IC
350 nm
XH035
3.3V … 2.2V
RAM/ROM Compiler
Frontend Memory Compiler DPRAM Dual port SRAM X-FAB
350 nm
XA035
3.3V … 2.2V
RAM/ROM Compiler
Frontend Memory Compiler DPRAM Dual port SRAM X-FAB
350 nm
XO035
3.3V … 2.2V
RAM/ROM Compiler
Frontend Memory Compiler DPRAM Dual port SRAM X-FAB
180 nm
XH018
1.8V
RAM/ROM Compiler
Frontend Memory Compiler DPRAMLP Low power dual port SRAM X-FAB
180 nm
XP018
1.8V
RAM/ROM Compiler
Frontend Memory Compiler DPRAMLP Low power dual port SRAM X-FAB
180 nm
XT018
1.8V
RAM/ROM Compiler
Frontend Memory Compiler DPRAMLP Low power dual port SRAM X-FAB
180 nm
XS018
1.8V
RAM/ROM Compiler
Frontend Memory Compiler DPRAMLP Low power dual port SRAM X-FAB
180 nm
XH018
1.8V
RAM/ROM Compiler
Frontend Memory Compiler DPRAMLPJI Low power dual port junction isolated SRAM X-FAB
180 nm
XP018
1.8V
RAM/ROM Compiler
Frontend Memory Compiler DPRAMLPJI Low power dual port junction isolated SRAM X-FAB
180 nm
XS018
1.8V
RAM/ROM Compiler
Frontend Memory Compiler DPRAMLPJI Low power dual port junction isolated SRAM X-FAB
All Geometries
All Processes

Soft IP
IP name: ECDSA; VHDL

VHDL-based ECDSA (Elliptic Curve Digital Signature Algorithm) IP core for SoCs. It adheres to the Standards for Efficient Cryptography (SEC) and uses the ANSI X9.63 secp256k1 Koblitz curve.

TES Electronic Solutions GmbH
All Geometries
All Processes

Microprocessor
IP name: EMSA5-FS 32-bit RISC-V functional safety processor IP core. ISO26262 ASIL-D ready. Fraunhofer IPMS
350 nm
XH035
3.3V
Other
IP name: High V Input Cell High Voltage Input for input voltages up to 100V Ridgetop Group
350 nm
XH035
12V
Charge Pumps
IP name: HT_CP_HV 18-28V VDD, 12V Vref, 26-40V Vout Chargepump with 2 external diodes and external Cfly capacitors, for HS gate driving. Silansys
350 nm
XH035
3.3V
Other
IP name: HT_CSC Programmable Trip Current Sense Instrumentation Amp and Comparator. Silansys
350 nm
XH035
3.3V
PLL
IP name: HT_Frac_PLL Fractional_N PLL for low-noise fractional frequency synthesis with VCO running to 400MHz and 20Hz frequency resolution for Fin=20MHz, Fout=2-40MHz. Silansys
350 nm
XH035
3.3V
Other
IP name: HT_HRM Harmonic Reject Mix, Gain 12dB, 1dB Compression = 2Vpp. Silansys
350 nm
XH035
12V
Voltage Regulator
IP name: HT_LDO_HV_12V HV LDO Vin 18-38V, Vo=12V, Trim in 5% steps, Idd=1mA, Load Current 20mA max, 30dB PSRR, External Decoupling Cap. Verified by Simulation for XH035.

Silansys
350 nm
XH035
3.3V
Voltage Regulator
IP name: HT_LDO_HV_3.3V HV LDO Vin 18-38V, Vo=3.3V, Trim in 5% steps, Idd=1mA, Load Current 20mA max, 30dB PSRR, External Decoupling Cap. Verified by Simulation for XH035.

Silansys
350 nm
XH035
5V
Voltage Regulator
IP name: HT_LDO_HV_5V0 HV LDO Vin 18-38V, Vo=5.0V, Trim in 5% steps, Idd=1mA, Load Current 20mA max, 30dB PSRR, External Decoupling Cap. Verified by Simulation for XH035.

Silansys
350 nm
XH035
3.3V
Driver
IP name: HT_LDO_HV_GD HV Gate Driver with HS and LS drive outputs, for internal or external Power MOS drive. Silansys
350 nm
XH035
3.3V
Other
IP name: HT_LNA_TIA Low Noise Transimpedance Amplifier,Transimpedance 900Ohm/3.6Ohm, 1dB Compression 400mVpp. Silansys
350 nm
XH035
3.3V
Other
IP name: HT_MUX_16:1 High Temperature Analog Mux with >50dB isolation. Silansys
350 nm
XH035
3.3V
Microprocessor
IP name: HT_OpencoreMSP430 High Temperature 200°C OpencoreMSP430 CPU with foundry 3K Data SRAM, 11k Program EEPROM & SRAM IP, 256 byte Data EEPROM, UART, SPI, LIN, GPIO peripherals. Silansys
350 nm
XH035
3.3V
Oscillator
IP name: HT_OSC_8M -40°C - 220°C Integrated Oscillator Clock Generator, Nominal frequency 8MHz. Silansys
 

   MP = Mass ProductionPT = Prototyping, Silicon provenID = in DesignVS = Verified by Simulations (Soft-IP)

Displaying results 541 to 570 out of 760



*Disclaimer:
The Intellectual Partner Network is a web database provided by X-FAB in cooperation with selected partners. Both X-FAB and a variety of different IP supplier offer their IP to customers using X-FAB’s foundry process. X-FAB will support customers to get in direct contact with the relevant IP supplier.

X-FAB will take no responsibility nor any liability whatsoever for the information or products offered or provided by the other IP suppliers at the database of the Intellectual Partner Network. X-FAB shall have no liability towards the customers for any use of and/or reliance of the products provided by the other IP suppliers at the database of the Intellectual Partner Network.

X-FAB's own IP is subject to a license agreement. X-FAB IP marked with “*” are part of the Master Kit or Master Kit Plus library. If you can not find the IP you are looking for, please contact the respective sales manager in your region. We continuously extend our libraries and offer a custom cell development service as well.