ResourceXplorer

Find our technical papers, webinars, articles

The ResourceXplorer enables you to access technical papers, webinars and articles related to analog/mixed-signal semiconductor technologies.



324 entries found

The use of a thick Copper layer on top of an AlCu-metallization stack instead of common thick Aluminium layer triggers a need for a change in the reliability characterization, the test structure layouts and methods. The failure and degradation mechanisms of thick Copper and Aluminium are partly different for the material as well as for thick and thin metal layers.
Optical sensing is often based on a broad band detector with an application specific optical filter in front, to achieve the required selectivity. Silicon photodetectors have been used since years and the improvements in CMOS fabrication has led to in-creased performance and dropping prices.
In CMOS technologies with AlCu metallization, the common via shape is cylindrical. The size of the via is as small as possible for the related process and a maximum current per via is specified. Huge via arrays are in use for high current tracks. For future applications especially for automotive customers, the mission profiles of the products will be more challenging. Higher temperature, thermal expansion and cycling, higher current and high current pulses will require higher robustness of the metallization system.

More complex designs, shorter time to market and less time for engineering – these are the challenges IC designers are facing today. X-FAB addresses these to assist you in your design process. This 10th webinar of X-FAB’s first-time-right series will look at advancements made related to PDK features and design methodology since starting the series three years ago.
This webinar will showcase innovative PDK features and design methods which help you maximize design productivity and achieve first-time-right functional silicon.
Join this webinar and learn about new capabilities such as dummy structure generation flow for improved design robustness, simplified analysis of operating condition check results and advanced IP features for power/performance/area optimization.

This paper presents the design and experimental characterization of a microfluidic system comprising a novel bi-phasic liquid combination actuated by EWOD (electrowetting-on-dielectrics).
Negative Bias Temperature Instability (NBTI) is one of the critical degradation mechanisms in semiconductor device reliability that causes shift in the threshold voltage (Vth). However up until this decade being able to quantize and thoroughly understand the behavior of NBTI had still been in vain due to a recovery characteristics known as NBTI recovery. The first part of this paper shows a brief introductory to NBTI and the severe implications of NBTI recovery. 
An increasing number of applications such as automotive engine management require electronic systems which operate reliably at temperatures above 150°C. Designers are facing the challenges of dealing with changes in electrical characteristics, higher leakage current and thermally accelerated degradation.This webinar looks at the device physics, electrical properties of MOSFETs and NVMs, and degradation mechanisms at elevated temperatures up to 200°C.
For a non-passivated thick Copper metallization on top of an AlCu stack a change in the reliability characterization and test strategy is necessary. Degradation mechanisms of thick Copper are partly different from thick Aluminium.

The best performance of a semiconductor component will not necessarily lead to success if it cannot be manufactured with a suitable quality. In order to achieve highest quality at reasonable costs, very challenging solutions need to be developed and integrated into semiconductor technologies. To enable advanced analog/mixed-signal products for a safe application in harsh environments such as automotive or avionics and for consumer markets, built-in robustness is paramount. The webinar will show the requirements, solutions and consequences for X-FAB’s semiconductor manufacturing processes and their architecture. Important aspects such as process and primitive device selection, process capability, primitive device reliability and chip-package interaction will be addressed. Finally, guidelines for the development and qualification of robust products and a safe launch process will be presented.

Glass frit wafer bonding remains a very attractive process for industrial applications. The main benefit is that the glass frit is an active bonding layer, which planarizes surface roughness and topography up to the direct sealing of metal lines at the bonding interface. This allows very simple process integration.