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The ResourceXplorer enables you to access technical papers, webinars and articles related to analog/mixed-signal semiconductor technologies.
324 entries found
XO035 is X-FAB’s specialized process for high-speed optoelectronics. It is especially suited for applications needing high-sensitivity high-bandwidth photodiodes arrays, such as optical data storage, optical data communication or high dynamic range sensors. Special opto-process modules allow an optimised PIN cathode implantation, optical window etching and dedicated ARC layer deposition.
Best-in-class PDK support for all major EDA vendors, extensive device characterization and modelling, comprehensive analog, digital, and memory IPs.
Key features:
- Fully modular 350 nm EPI process based on 3.3 V core module
- Alternative 5 V module
- Up to four metal layers with different thick metal options
- High-sensitive PIN photodiodes
- Optical window etching and Anti Reflecting Coating optimized for different wavelengths
- High gain BJTs
- Standard single, double MIM, Poly and metal fringe capacitors
- Comprehensive PDK support for Cadence, Siemens EDA, Synopsys and others
XA035 is a comprehensive modular 350 nm sensor and high-voltage EPI technology. It combines the benefit of a 350 nm modular 3.3 V ultra low noise process supporting an extended temperature range of -40 to 175 °C with an extensive portfolio of high voltage and analog devices. The XA035 platform is designed for robust automotive sensor, sensor interface and actuator applications.
Best-in-class PDK support for all major EDA vendors, extensive device characterization and modelling, comprehensive analog, digital, and memory IPs.
Key features:
- Fully modular 350 nm EPI process based on 3.3 V ultra low noise core module
- Optional 3.3 V / 5 V dual gate
- Best-in-class ultra low noise 3.3 V PMOS
- Up to four metal layers with thick metal options
- Up to 175 ºC operating temperature supporting AEC-Q100 grade 0
- Unique integration of digital, analog, HV and NVM in a single process
- High-reliability automotive NVM solutions including EEPROM
- Optical window etching and Anti Reflecting Coating for high sensitive photodiodes
- 10 V – 100 V HV CMOS transistors with 3.3 V, 5 V or 18 V Gate Oxide
- High gain BJTs
- HV Schottky diodes
- Standard single, double MIM, Poly and Metal Fringe capacitors
- Comprehensive PDK support for Cadence, Siemens EDA, Synopsys and others
XH035 is a comprehensive modular 350 nm sensor and high-voltage EPI technology. It combines the benefit of a 350 nm modular 3.3 V ultra low noise process with an extensive portfolio of high voltage and analog devices. The XH035 platform is designed for robust sensor and sensor interface applications.
Best-in-class PDK support for all major EDA vendors, extensive device characterization and modelling, comprehensive analog, digital, and memory IPs.
Key features:
- Fully modular 350 nm EPI process based on 3.3 V ultra low noise core module
- Alternative 5 V core module or 3.3 V / 5 V dual gate
- Best-in-class ultra low noise 3.3 V PMOS
- Up to four metal layers with thick metal options
- Up to 125 ºC operating temperature supporting AEC-Q100 grade 1
- Unique integration of digital, analog, HV and NVM in a single process
- High-reliability automotive NVM solutions including EEPROM
- Optical window etching and Anti Reflecting Coating for high sensitive photodiodes
- 10 V – 100 V HV CMOS transistors with 3.3 V, 5 V or 18 V Gate Oxide
- High gain BJTs
- HV Schottky diodes
- Standard single, double MIM, Poly and metal fringe capacitors
- Comprehensive PDK support for Cadence, Siemens EDA, Synopsys and others
XPH90 platform combines the advantages of high-performance III-V materials with the scalability of silicon to set new standards for data transmission. Through heterogeneous integration, XPH90 brings together silicon-on-insulator (SOI) technology, silicon (Si) and silicon nitride (SiN) waveguides, high-efficiency electro-optic modulators and state-of-the-art grating couplers with indium phosphide (InP) and other materials to meet the growing demand for faster and more integrated solutions required in high-speed data center, telecom and LiDAR applications.
Key features:
- Optimized SOI photonics platform for heterogeneous integration of III-V materials
- Micro-transfer printing for seamless integration of active photonic components
- Wide range of photonics devices available
- Si and SiN waveguides with multiple etch levels for enhanced optical performance
- High and low refractive index materials for optimized coupling with III-V components
- Optical windows and cavities enabling light connections and sensing applications
- Cu metallization (2-4 layers) and an aluminum layer for flip-chip assembly
- Deep etching technology for edge fiber coupling and singulation
- Process customization possible at certain steps
Abstract—Crosstalk can reduce the performance of RF, analog, mixed-signal and digital integrated circuits (ICs). Measurement methods using appropriate measurement parameters to evaluate substrate crosstalk are discussed. Several layout options and technological parameters are compared. Based on these results the designer can choose and combine a set of options for more isolation of sub circuits to fulfill the requirements for the specific application. The starting point lies on standard CMOS technologies but focus is set on the different SOI technologies. Depending on frequency range the influence
of isolation measures and their combinations is shown. The Sparameters of several test structures were measured in the range from 10 MHz to 4 GHz using a vector network analyzer.
Abstract
Broadband reduced reflection loss of front side illuminated photodiodes realized within the restrictive environment of a standard 0.18 μm CMOS production process without compromising dark current, capacitance or any other parameter.
The Challenges of a CMOS Backend
Advanced CMOS technologies realize complex electrical routing in their backend. Optical sensors implemented therein face the difficulty that light needs to pass through this backend stack. With copper metallization, the need for special light pipes came up, and nowadays avoiding the light passing through the frontend by using back side illumination (BSI) is common. BSI is additional effort and products which do not afford it, would benefit from a better light coupling.
The reliability of smaller scribe line & bond pads has been evaluated in this work to improve cost-efficiency from lesser wafer space consumption. Both fully automatic probers with probe cards and semi-auto probers with micro positioners have been analyzed. Two cantilever types of probe cards have been assessed. Various reliability test method with Wafer Level Reliability have been assessed for transistor, capacitor, and metal lines. The wafer level probing was conducted on probe chuck at room temperature, 150°C and 175°C. The bondability with smaller bond pads was collaborated with two external assembly houses using ceramic dual-line package. Wire Bond Shear and Wire Bond Pull tests have been carried out to check the reliability of bonding. Package Level Reliability Electromigration and Time Dependent Dielectric Breakdown tests have been executed at 220°C and 175°C to confirm the reliability impact from smaller bond pads.
A commercially attractive vertical GaN MOSFET process using 200 mm GaN-on-Silicon substrate wafers in an industrial CMOS environment.
Main challenges are:
- Epitaxially grown PiNN+ GaN structure
- Frontside MOSFET gate
- Membrane approach, with cavities etched from the backside upwards and sub-sequent thick metallization
Abstract— This study presents an electrical characterization evaluation of a partial Silicon-On-Insulator (PSOI) Superjunction (SJ) Lateral Diffused n-type MOSFET (LDNMOS) and Lateral SJ Diode, integrated into a 0.18μm technology platform. Despite the added process complexity compared with SOI reduced surface field (RESURF), this technology offers a wider range of voltage ratings due to the action of the depletion layer in the handle wafer (HW), reduced parasitic capacitances due to the extra volume of the depletion region in the HW and better heat conduction due to thinner buried oxide layer. The scalable high voltage SJ lateral diffused MOSFETs (LDMOS) cover a range of rated voltages from 45V to 375V, and the developed PSOI SJ Diodes exhibit an impressive reverse recovery behavior, rivaling the switching losses of SiC Schottky diodes.
The 110 nm BCD-on-SOI technology platform, XT011 is the latest evolution of X-FAB's foundry offering, continuing the tradition of best-in-class offer for high-voltage automotive, industrial and medical applications.
In this webinar, X-FAB will present a first overview of the technology, available design solutions, support and release schedule, providing an initial introduction to the enhanced capabilities and benefits of this offer for their product roadmap.
Presenters:
Heming Wei, Technical Marketing Manager
Barnabas Liao, Manager Design Support
Zhenkun Chen, Program Leader