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Sel. IP Name Category Provider Geometry Process Name Status Deliverable Description
XTAL5M Oscillator
Suter IC-Design AG
0.18 μm
XC018
MP
GDSII
Schematic

Low power crystal oscillator for resonator with fast start-up, available for XC018/XH018 MOS3LP, including pads, different pads on request.

xpstmc01_5V Other
X-FAB
0.35 μm
XU035
PT
Schematic
Layout
Analog Library

XU035: XSMPS_CELLS. Xpstmpc01_5V is an application specific, junction-isolated over-temperature detector.

xpsswdc01_5V Other
X-FAB
0.35 μm
XU035
PT
Schematic
Layout
Analog Library

XU035: XSMPS_CELLS. Xpsswdc01_5V is an application specific, junction-isolated CMOS switch driver for high voltage MOS transistor.

xpspwmc01_5V Oscillator
X-FAB
0.35 μm
XU035
PT
Schematic
Analog Library
Layout

XU035: XSMPS_CELLS. Xpspwmc01_5V is an application specific, junction-isolated 40kHz saw oscillator with clock (CLK) and duty maximum (DMAX) output for operating in circuits with Pulse-Width-Modulation.

xpsporc02_5V Power On/Off Reset
X-FAB
0.35 μm
XU035
PT
Schematic
Layout
Analog Library

XU035: XSMPS_CELLS. Xpsporc02_5V is an application specific, junction-isolated high precision Power-On-Reset circuit with hysteresis.

xpsporc01_5V Power On/Off Reset
X-FAB
0.35 μm
XU035
PT
Schematic
Layout
Analog Library

XU035: XSMPS_CELLS. Xpsporc01_5V is an application specific, junction-isolated high precision Power-On-Reset circuit with hysteresis.

xpsopac01_5V Operational Amplifier
X-FAB
0.35 μm
XU035
PT
Schematic
Layout
Analog Library

XU035: XSMPS_CELLS. Xpsopac01_5V is an application specific, general purpose internally compensated junction-isolated CMOS OpAmp with NMOS input stage and emitter follower output stage.

xpsolpc01_5V Other
X-FAB
0.35 μm
XU035
PT
Schematic
Layout
Analog Library

XU035: XSMPS_CELLS. Xpsolpc01_5V is an application specific, junction-isolated over-load protection module. The cell consists of comparator, 17-bit counter and output trigger.

xpslstc01_5V Voltage Regulator
X-FAB
0.35 μm
XU035
PT
Schematic
Layout
Analog Library

XU035: XSMPS_CELLS. Xpslstc01_5V is an application specific, 12V to 5V auxiliary internal linear voltage regulator for up to 6mA load current.

xpshvbc01_5V Other
X-FAB
0.35 μm
XU035
PT
Schematic
Layout
Analog Library

XU035: XSMPS_CELLS. Xpshvbc01_5V is an application specific, high voltage power supply module. The cell operates like linear regulator with current limit.

xpscsoc01_5V Bias
X-FAB
0.35 μm
XU035
MP
Schematic
Layout
Analog Library

XU035: XSMPS_CELLS. Xpscsoc01_5V is an application specific, junction-isolated general purpose current source (V-I cconverter type).

xpscsmc01_5V Other
X-FAB
0.35 μm
XU035
PT
Schematic
Layout
Analog Library

XU035: XSMPS_CELLS. Xpscsmc01_5V is an application specific, junction-isolated current sense module. The cell consists of compaarator and Leading Edge Blanking (LEB) cells.

xpscmpc01_5V Comparators
X-FAB
0.35 μm
XU035
PT
Schematic
Layout
Analog Library

XU035: XSMPS_CELLS. Xpscmpc01_5V is an application specific, general purpose junction isolated CMOS comparator with PMOS input stage.

xpsbgpc02_5V Bandgaps
X-FAB
0.35 μm
XU035
PT
Schematic
Layout
Analog Library

XU035: XSMPS_CELLS. Xpsbgpc02_5V is an application specific, high PSRR junction-isolated general purpose 2.25V bandgap reference with 6-bit trimming.

xpsbgpc01_5V Bandgaps
X-FAB
0.35 μm
XU035
PT
Schematic
Layout
Analog Library

XU035: XSMPS_CELLS. Xpsbgpc01_5V is an application specific, high PSRR junction-isolated general purpose 2.5V bandgap reference with additional 1.25V output.

xpsbgbc01_5V Other
X-FAB
0.35 μm
XU035
PT
Schematic
Layout
Analog Library

XU035: XSMPS_CELLS. Xpsbgbc01_5V is an application specific, junction-isolated multi-voltage reference buffer for bandgap cell.

VREG1_8 Voltage Regulator
Suter IC-Design AG
0.18 μm
XC018
MP
GDSII
Schematic

Low power voltage regulator for 1.8V logic, requires only an external capacitor, available for XC018/XH018 MOS3LP and MOS5LP, different option available on request.

Tunable Cryptography Security
Secure-IC
All Geometries
All Processes
PT
GDSII

Symmetric Cryptography, Asymmetric Cryptography, Hash and MAC functions. Embedding the state-of-the-art countermeasure against high order side-channel attacks, Tunable Crypto IP allows you to reach the perfect balance between Security, Speed, and Area.

TRNG Security
Secure-IC
All Geometries
All Processes
PT
GDSII

True Random Number Generators are used to generate statistically independent sets of bits for various applications such as One Time Pad cryptography, key generation, seeds for PRNGs, masks to protect an implementation against side-channel analysis.

TI-RF-Switch Analogue Switches
Thesys-Intechna
0.35 μm
XH035
VS
GDSII
Schematic

The TI-RF-Switch is a broad-band dual SPDT analog switch containing two single-pole double-throw switches. Used CMOS technology provides high isolation and low insertion loss at frequencies up to 1 GHz.

TI-RF-MUX Multiplexer
Thesys-Intechna
0.60 µm
XT06
VS
GDSII
Schematic

TI-RF-MUX is a 4-to-1 RF multiplexer designed with an internal current feedback output amplifier whose gain can be adjusted externally. There is a possibility of optional usage of two 4-to-1 devices as one 8-to-1 multiplexer. ESD protection provided.

TI-RF-DRV Driver
Thesys-Intechna
0.60 µm
XT06
VS
GDSII
Schematic

TI-RF-DRV is a fully differential RF driver for differential signal processing applications. Common-mode level of differential outputs is adjustable that allows to shift easily the input signals for driving single-supply ADCs. ESD protection provided.

TI-RF-CMP Comparators
Thesys-Intechna
0.60 µm
XT06
VS
GDSII
Schematic

TI-RF-CMP is a low power CMOS RF comparator with 4 ns propagation delay and latch function. ESD protection provided.

TI-Manchester Transceiver
Thesys-Intechna
0.60 µm
XT06
VS
GDSII
Schematic

TI-Manchester is a dual data bus transceiver designed for receiving CMOS/TTL Manchester II data, converting it and transmitting through a stepup transformer to the data bus...

TI-L500 Voltage Regulator
Thesys-Intechna
0.60 µm
XC06
PT
GDSII
Schematic

TI-L500 is a micro-power low dropout linear voltage regulator with fixed 5 V output voltage and input voltage of up to 40 V. ESD protection provided.

TI-DR-LS Driver
Thesys-Intechna
0.60 µm
XT06
VS
Schematic

The dual high-speed gate drivers are especially well suited  for driving the MOSFETs and IGBTs. Each of the two outputs can sourse and sink 4A of current while producing voltage rise and fall times of less than 10 ns. Low propagation delay and fast, matched rise and fall times make the driver ideal for high-frequency and high-power applications.

TI-DR-H&LS Driver
Thesys-Intechna
1.00 µm
XDH10
VS
Schematic

The driver is a high-voltage device, manufactured with SOI technology. It has a driver structure that enables ti drive independent referenced channel power MOS or IGBT. The upper (floating) section is enabled to work with voltage rail up to 600 V. The Logic Inputs are CMOS/TTL compatible for ease of interfacing with controlling devices.

TI-16PI/150M ADC
Thesys-Intechna
0.18 μm
XT018
VS
GDSII
Schematic

TI-16PI/150M is a dual-channel fully differential 16-bit ADC with pipelined architecture optimized for high dynamic performance at sample rates up to 180 MSPS.

TCP Offload Engine Other
easics NV
All Geometries
All Processes
VS
VHDL
Verilog

Easics' TCP Offload Engine (TOE) can be used to offload the TCP/IP stack from the CPU and handle it in ASIC hardware. This core is an all-hardware configurable IP block. It acts as a TCP server for sending and receiving of TCP/IP data. Because everything is handled in hardware very high throughput and low latency are possible.

Securyzr Security
Secure-IC
All Geometries
All Processes
PT
GDSII

Secure-IC Securyzr provides a complete range of security features while addressing all the state-of-the-art threats against embedded systems. Securyzr is customized according to each market's and client's specific requirements.

 


MP = Mass ProductionPT = Prototyping, Silicon provenID = in DesignVS = Verified by Simulations (Soft-IP)

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