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Sel. IP Name Category Provider Geometry Process Name Status Deliverable Description
atmpc01
X-FAB
1.00 µm
XC10
PT
Schematic
Layout
Analog Library

XC10: A_CELLS; A_CELLS_M1. atmpc01 is a high-temperature detector. An OVERT output signal (active low) is generated when the chip temperature rises above 140 °C (approx.).

atmpc02
X-FAB
1.00 µm
XC10
PT
Schematic
Layout
Analog Library

XC10: A_CELLS; A_CELLS_M1. atmpc02 is a high-temperature detector. An OVERT output signal (active low) is generated when the chip temperature rises above 160 °C (approx.).

adc10 ADC
X-FAB
0.80 µm
CX08
PT
Schematic
Layout
Analog Library

CX08A: Analog library. ADC10 is a 10-bit analog-to-digital converter which utilizes successive approximation technique.

adc8 ADC
X-FAB
0.80 µm
CX08
PT
Schematic
Layout
Analog Library

CX08A: Analog library. ADC8 is a 8-bit analog-to-digital converter which utilizes successive-approximation
technique.

ADC10 ADC
X-FAB
0.60 µm
XB06
PT
Schematic
Layout
Analog Library

XB06: A_CELLS. ADC10 is a 10-bit analog-to-digital converter which utilizes successive approximation technique.

ADC8 ADC
X-FAB
0.60 µm
XB06
PT
Schematic
Layout
Analog Library

XB06: A_CELLS. ADC8 is a 8-bit analog-to-digital converter which utilizes successive-approximation technique.

aadcc01 ADC
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aadcc01 is a 10-bit successive approximation Analog-to-digital converter (ADC). The ADC operates with a single 5V power supply and an external voltage reference.

aadcc02 ADC
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aadcc02 is a 8-bit two-step Analog-to-Digital converter (ADC). Due to its two-step architecture aadcc02 features very low power consumption combined with moderate speed and low nonlinearity errors.

aadcc03 ADC
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aadcc03 is a 8-bit successive approximation Analog-to-digital converter (ADC). The ADC operates with a single 5V power supply and an external voltage reference.

aadcc02 ADC
X-FAB
0.35 μm
XH035
PT
Schematic
Layout
Analog Library

XH035: A_CELLS. For MOS module only. aadcc02 is a 10-bit successive approximation Analog-to-Digital converter (ADC). The ADC operates with a single 3.3V power supply and external voltage reference.

aadcc01_3v3 ADC
X-FAB
0.18 μm
XC018
PT
Schematic
Layout
Analog Library

XC018 LP 3.3V aadcc01_3v3 is a 10-bit successive approximation Analog-to-Digital converter (ADC). The ADC operates with a single 3.3V power supply and an external voltage reference.

aadcc01 ADC
X-FAB
0.60 µm
XT06
PT
Schematic
Layout
Analog Library

XT06 aadcc01 is a 10-bit successive approximation Analog-to-Digital converter (ADC). The ADC operates with a single 5V power supply and an external voltage reference.

aadcc02 ADC
X-FAB
0.60 µm
XT06
PT
Schematic
Layout
Analog Library

XT06

aadcc03 ADC
X-FAB
0.60 µm
XT06
PT
Schematic
Layout
Analog Library

XT06

AR32X3A ADC
Archband Labs Inc.
0.25 μm
FC025
PT
GDSII

AR32X3A is a 16-bit ADC for measurement purpose in 0.25µm node.

aadcc01_5v ADC
X-FAB
0.18 μm
XC018
PT
Analog Library
Layout
Schematic

XC018 LP 5V aadcc01_5v is a 10-bit successive approximation Analog-to-Digital converter (ADC). The ADC operated with a single 5.0V analog power supply, 1.8V digital power supply and an external voltage reference.

CM2013ae ADC
chipus
0.35 μm
XH035
PT
GDSII
Verilog
LVS Netlist

Low power, general purpose, 10-bit, 50kSPS, Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) core. The circuit uses one 3.3V analog supply and one 3.3V digital supply and is targeted for microcontroller applications.

aadcc01_3v3 ADC
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V aadcc01_3v3 is a 10-bit successive approximation Analog-to-Digital converter. The ADC operates with a single 3.3V analog power supply; 1.8V digital power supply and an external voltage reference.

8b-20 Msps ADC with 4 :1 Mux ADC
EASii IC
0.18 μm
XP018
VS
Layout
Schematic

High Speed 8 bits ADC running at 20 MSps including an analog multiplexer 4:1
Only  2 clock latency
power :22mW
Voltage supply: 3.3V

ADC12b017kS180nm ADC
Fraunhofer IIS/EAS
0.18 μm
XH018
PT
GDSII
Schematic

Cyclic single ADC, 12bit resolution, 17kSps, 0.5 LSB INL, 12bit ENOB, 50µW power consumption.

ADC12b054kS180nm ADC
Fraunhofer IIS/EAS
0.18 μm
XH018
PT
GDSII
Schematic

Cyclic single ADC, 12bit resolution, 54kSps, 1.6 LSB INL, 10.5bit ENOB, 370µW power consumption

ADC16b013kS180nm ADC
Fraunhofer IIS/EAS
0.18 μm
XH018
PT
GDSII
Schematic

Cyclic single ADC, 16bit resolution, 13kSps, 12.7 bit ENOB, 50µW power consumption

ADC12b020MS350nm ADC
Fraunhofer IIS/EAS
0.35 μm
XH035
PT
GDSII
Schematic

Pipelined ADC, 12bit resolution, 20MSps, 9.6 bit ENOB@2MSps, 9.2 bit ENOB@20MSps,  2 LSB INL, 125mW power consumption

TI-16PI/150M ADC
Thesys-Intechna
0.18 μm
XT018
VS
GDSII
Schematic

TI-16PI/150M is a dual-channel fully differential 16-bit ADC with pipelined architecture optimized for high dynamic performance at sample rates up to 180 MSPS.

ADC12b040MS180nm ADC
Fraunhofer IIS/EAS
0.18 μm
XC018
MP
GDSII
Schematic

Pipeline ADC, 12bit resolution, 1-40MSps, single-end and fully differential input buffer.

ADC15b008kS180nm ADC
Fraunhofer IIS/EAS
0.18 μm
XH018
MP
GDSII
Schematic

Sigma-Delta-ADC, 15bit, 8-192kS/s sampling rate, up to 4 differential inputs

ADC15b008kS180nm ADC
Fraunhofer IIS/EAS
0.18 μm
XH018
MP
GDSII
Schematic

Sigma-Delta-ADC, 15bit, 8-192kS/s sampling rate, up to 4 differential inputs

aadcc02_3v3 ADC
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aadcc02_3v3 is a 10-bit single ended successive approximation Analog-to-Digital converter (ADC) based on charge redistribution Digital-to-Analog converter with up to 1.4Msps conversion rate.

aadcc03_3v3 ADC
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aadcc03_3v3 is a 10-bit fully differential successive approximation Analog-to-Digital converter (ADC) based on charge redistribution Digital-to-Analog converter with up to 3.3Msps conversion rate.

aadcc01_1v8 ADC
X-FAB
0.18 μm
XH018
PT
Layout
Schematic
Analog Library

XH018 LPMOS 1.8V aadcc01_1v8 is a 10-bit fully differential successive approximation ADC based on high-resolution 10-bit segmented capacitor DAC decreasing the total input capacitance.

 


MP = Mass ProductionPT = Prototyping, Silicon provenID = in DesignVS = Verified by Simulations (Soft-IP)

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