IP Portal

Sel. IP Name Category Provider Geometry Process Name Status Deliverable Description
arcoc12_1v8 Oscillator
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 1.8V arcoc12_1v8 is a robust 10kHz RC oscillator with internal R and C.

aadcc02_3v3 ADC
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aadcc02_3v3 is a 10-bit single ended successive approximation Analog-to-Digital converter (ADC) based on charge redistribution Digital-to-Analog converter with up to 1.4Msps conversion rate.

aadcc03_3v3 ADC
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aadcc03_3v3 is a 10-bit fully differential successive approximation Analog-to-Digital converter (ADC) based on charge redistribution Digital-to-Analog converter with up to 3.3Msps conversion rate.

adacc01_5v DAC
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 5V adacc01_5v is a 10-bit voltage-scaling (potentionetric) Digital-to-Analog converter (DAC). The adacc01 DAC operates with a single 5.0V power supply and external reference voltage.

adacc02_1v8 DAC
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 5V adacc02_1v8 is a 8-bit decoder based Digital-to-Analog converter (DAC). The adacc01 DAC operates with a single 1.8V power supply and external reference voltage.

aporc01_1v8 Power On/Off Reset
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 1.8V aporc01_1v8 is a dynamic Power-on-Reset circuit with low current consumption. POR output is kept high during power-on as long as supply voltage is below threshold voltage.

aporc02_1v8 Power On/Off Reset
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 1.8V aporc02_1v8 is a dynamic Power-on/off-Reset circuit with hysteresis (reset signals are generated on both rising and falling edges of supply voltage). POR output is kept high during power-on as long as supply voltage is below threshold voltage.

aporc03_1v8 Power On/Off Reset
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 1.8V aporc03_1v8 is a dynamic Power-on/off-Reset circuit with hysteresis (reset signals are generated on both rising and falling edges of supply voltage). POR output is kept high during power-on as long as supply voltage is below threshold voltage.

aopac13 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. aopac13 is a high-voltage (VDD up to 10V), low-power, internally-compensated CMOS OpAmp with PMOS input stage.

aopac14 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. aopac14 is a high-voltage (VDD up to 10V), low-power, internally-compensated CMOS OpAmp with NMOS input stage.

aopac15 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. aopac15 is a high-voltage, internally-compensated CMOS OpAmp with NMOS input stage and bipolar emitter-follower output. The incorporated level shifters allow the EN and ENB inputs to be controlled by 5V circuitry.

abiac07 Bias
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. abiac07 is a high-voltage bias cell. The circuit forces a current of 2µA (approx.) to flow through pghv PMOS with W/L ratio of 10µm/10µm and nmv NMOS with W/L ratio of 10µm/12µm.

abiac08 Bias
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. abiac08 is a high-voltage bias cell. THe circuit forces a current of 2µA (approx.) to flow through pgmv PMOS with W/L ratio of 10µm/10µm and nhv NMOS with W/L ratio od 10µm/12µm. The cell features low-cost process option and is a co

adrvc01 Driver
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. adrvc01 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (high-side switch). High input voltage makes the output go low (connected to ground). The rising slope of the output signal c

adrvc02 Driver
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. adrvc02 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (low-side switch). High input voltage makes the output go low (connected to ground).

adrvc03 Driver
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. adrvc03 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (high-side switch). High input voltage makes the output go low (connected to ground). The rising slope of the output signal c

aopac01 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aopac01 is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and source follower output stage.

aopac02 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aopac02 is a fast internally compensated CMOS OpAmp with N-MOS input stage and rail-to-rail output stage. Due to the dynamic biasing of the input stage, a high slew rate is achieved, while power consumption is kept moderate.

aopac03 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aopac03 is a general purpose internally compensated CMOS OpAmp with N-MOS input stage and bipolar emitter follower output stage.

aopac06 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aopac06 is a general purpose internally compensated CMOS OpAmp with N-MOS input stage and rail-to-rail output stage.

aopac07 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aopac07 is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and rail-to-rail output stage.

aopac08 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aopac08 is a general purpose internally compensated rail-to-rail input, rail-to-rail output OpAmp.

aopac09 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aopac09 is a fast internally compensated CMOS OpAmp with N-MOS input stage and P-MOS source follower at the output stage.

aopac10 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aopac10 is a fast internally compensated CMOS OpAmp with P-MOS input stage and N-MOS source follower at the output stage.

aopac11 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aopac11 is a low-power, internally compensated CMOS OpAmp with P-MOS input stage and N-MOS source follower at the output stage.

aopac12 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aopac12 is a low-power, internally compensated CMOS OpAmp with N-MOS input stage and P-MOS source follower at the output stage.

acmpc01 Comparators
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. acmpc01 is a low-power CMOS comparator with N-MOS input stage.

acmpc02 Comparators
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. acmpc02 is a low-power CMOS comparator with P-MOS input stage.

acmpc03 Comparators
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. acmpc03 is a fast CMOS voltage comparator with N-MOS input stage. A hysteresis of some 14mV (typ) is intentionally introduced to ensure proper operation.

acmpc04 Comparators
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. acmpc04 is a fast CMOS voltage comparator with P-MOS input stage. A hysteresis of some 14 mV (typ) is intentionally introduced to ensure proper operation.

 


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