IP Portal

Sel. IP Name Category Provider Geometry Process Name Status Deliverable Description
aregc01 Voltage Regulator
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. aregc01 is a 5V / 3.3V positive voltage linear regulator for up to 10 mA load current.

aregc02 Voltage Regulator
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. aregc02 is a 2.4V / 3.3V positive voltage switching regulator for on-chip loads and up to 10 mA load current.

adrvc01 Driver
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. adrvc01 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output. The rising slope of the output signal can be controlled by means of a bias current.

atmpc01 X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. atmpc01 is a high-temperature detector. An OVERT output signal (active low) is generated when the chip temperature rises above 140 °C (approx.).

atmpc02 X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. atmpc02 is a high-temperature detector. An OVERT output signal (active low) is generated when the chip temperature rises above 160 °C (approx.).

D17IP15 Voltage Regulator
Desert Microtechnology
1.00 µm
XC10
MP
GDSII
Schematic

D17IP15 is a voltage regulator with built in reference.  Has 5V low drop out regulator that can operate from 5.5V - 25V supply.  Has 14V regulator when the supply is > 25V.  Can be paired with D17IP16 to generate a voltage oscillator.

D17IP16 Oscillator
Desert Microtechnology
1.00 µm
XC10
MP
GDSII
Schematic

D17IP16 is a voltage oscillator at 500 kHz.  It requires 3 input reference voltages 1.064V, 1.275V and 0.762V.  These voltages can be generated with the D17IP15.  Output is to designed to drive on chip light loads.

aopac13 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS_HV. aopac13 is a high-voltage (VDD up to 10V), low-power, internally-compensated CMOS OpAmp with PMOS input stage.

aopac14 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. aopac14 is a high-voltage (VDD up to 10V), low-power, internally-compensated CMOS OpAmp with NMOS input stage.

aopac15 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. aopac15 is a high-voltage, internally-compensated CMOS OpAmp with NMOS input stage and bipolar emitter-follower output. The incorporated level shifters allow the EN and ENB inputs to be controlled by 5V circuitry.

abiac07 Bias
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. abiac07 is a high-voltage bias cell. The circuit forces a current of 2µA (approx.) to flow through pghv PMOS with W/L ratio of 10µm/10µm and nmv NMOS with W/L ratio of 10µm/12µm.

abiac08 Bias
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. abiac08 is a high-voltage bias cell. THe circuit forces a current of 2µA (approx.) to flow through pgmv PMOS with W/L ratio of 10µm/10µm and nhv NMOS with W/L ratio od 10µm/12µm. The cell features low-cost process option and is a co

adrvc01 Driver
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. adrvc01 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (high-side switch). High input voltage makes the output go low (connected to ground). The rising slope of the output signal c

adrvc02 Driver
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. adrvc02 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (low-side switch). High input voltage makes the output go low (connected to ground).

adrvc03 Driver
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. adrvc03 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (high-side switch). High input voltage makes the output go low (connected to ground). The rising slope of the output signal c

aopac01 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aopac01 is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and source follower output stage.

aopac02 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac02 is a fast internally compensated CMOS OpAmp with N-MOS input stage and rail-to-rail output stage. Due to the dynamic biasing of the input stage, a high slew rate is achieved, while power consumption is kept moderate.

aopac03 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac03 is a general purpose internally compensated CMOS OpAmp with N-MOS input stage and bipolar emitter follower output stage.

aopac06 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac06 is a general purpose internally compensated CMOS OpAmp with N-MOS input stage and rail-to-rail output stage.

aopac07 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac07 is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and rail-to-rail output stage.

aopac08 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac08 is a general purpose internally compensated rail-to-rail input, rail-to-rail output OpAmp.

aopac09 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac09 is a fast internally compensated CMOS OpAmp with N-MOS input stage and P-MOS source follower at the output stage.

aopac10 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac10 is a fast internally compensated CMOS OpAmp with P-MOS input stage and N-MOS source follower at the output stage.

aopac11 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac11 is a low-power, internally compensated CMOS OpAmp with P-MOS input stage and N-MOS source follower at the output stage.

aopac12 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac12 is a low-power, internally compensated CMOS OpAmp with N-MOS input stage and P-MOS source follower at the output stage.

acmpc01 Comparators
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. acmpc01 is a low-power CMOS comparator with N-MOS input stage.

acmpc02 Comparators
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. acmpc02 is a low-power CMOS comparator with P-MOS input stage.

acmpc03 Comparators
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. acmpc03 is a fast CMOS voltage comparator with N-MOS input stage. A hysteresis of some 14mV (typ) is intentionally introduced to ensure proper operation.

acmpc04 Comparators
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. acmpc04 is a fast CMOS voltage comparator with P-MOS input stage. A hysteresis of some 14 mV (typ) is intentionally introduced to ensure proper operation.

acmpc06 Comparators
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. acmpc06 is a fast rail-to-rail CMOS voltage comparator.

 

MP = Mass ProductionPT = Prototyping, Silicon provenID = in DesignVS = Verified by Simulations (Soft-IP)

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