IP Portal

Sel. IP Name Category Provider Geometry Process Name Status Deliverable Description
aporc03 Power on Reset
X-FAB
0.60 µm
XT06
Layout
Schematic
Analog Library

XT06 aporc03 is a Power-on-Rest circuit. Reset signals are generated on both the rising and falling edge of the supply voltage. During power-on, POR output is kept high as long as the supply voltage is below the high threshold.

achpc01 Charge Pumps
X-FAB
0.60 µm
XT06
PT
Layout
Schematic
Analog Library

XT06 achpc01 is a doubling charge pump 3.3V => 5.6V.

abgpc01_3v3 Bandgaps
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V abgpc01 is a general purpose low-power bandgap reference with N-well resistors.

abgpc02_3v3 Bandgaps
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V abgpc02 is a general purpose low-power bandgap reference with rnp1 resistors

abgpc03_3V3 Bandgaps
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V abgpc03 is a low-voltage bandgap reference with N-well resistors.

aopac03_3v3 Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aopac03_3v3 is a general purpose internally compensated rail-to-rail input, rail-to-rail output CMOS operational amplifier (OpAmp). The speed, gain bandwidth, and the power consumption of the amplifier are set by means of a bias curren

aopac06_3v3 Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aopac06_3v3 is a general purpose internally compensated rail-to-rail input, rail-to-rail output CMOS operational amplifier (OpAmp).

aopac07_3v3 Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aopac07_3v3 is a general purpose internally compensated rail-to-rail input, railt-to-rail ouput CMOS operational ampl;ifier (OpAmp).

aopac08_3v3 Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aopac08_3v3 is a general internally compensated NMOS input, rail-to-rail output CMOS operational amplifier (OpAmp).

aopac09_3v3 Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aopac09_3v3 is a general purpose internally compensated PMOS input, rail-to-rail output CMOS operational amplifier (OpAmp).

axtoc01_3v3 Crystal Oscillators
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V axtoc01_3v3 is a robust 32.768 kHz crystal oscillator for supply voltage range from 2.4 to 3.6V.

aporc01_3v3 Power on Reset
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aporc01_3v3 is a dynamic power-on-reset circuit (POR). The cell is suitable for applicaitons where low consumption is important.

aporc02_3v3 Power on Reset
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aporc02_3v3 is a Power-on-Reset circuit with hysteresis. Reset signals are generated on both the rising and falling edge of the supply voltage.

aporc03_3v3 Power on Reset
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aporc03_3v3 is a Power-on-Rest circuit. Reset signals are generated on both the rising and falling edge of the supply voltage.

aregc01_3v3 Voltage Regulator
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC01801_3v3 is a 3.3V/1.8V linear voltage regulator for up to 20mA load current and internal bandgap reference. The regulator is implimented as a macro cell that fits into the core-limited I/O ring.

atmpc01_3v3 Other
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V atmpc01_3v3 is an over-temperature detector. When the chip temperature rises over the high threshold temperature (~130°C) the output signal turns high.

avcoc01_3v3 VCO
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V avcoc01_3v3 is a voltage controlled oscillator (VCO).

abgpc05_1v8 Bandgaps
X-FAB
0.18 μm
XH018
PT
Layout
Schematic
Analog Library

XH018 LP3MOS 1.8V abgpc05_1v8 is a general purpose 1.2V bandgap reference with N-well resistors and NPN (qnva) diode matrix.

abgpc01_1v8 Bandgaps
X-FAB
0.18 μm
XH018
PT
Layout
Schematic
Analog Library

 XH018 LP3MOS 1.8V abgpc01_1v8 is a general purpose 1.2V bandgap reference with N-well resistirs and PNP (qpvc) diode matrix

8b-20 Msps ADC with 4 :1 Mux ADC
EASii IC
0.18 μm
XP018
VS
Layout
Schematic

High Speed 8 bits ADC running at 20 MSps including an analog multiplexer 4:1
Only  2 clock latency
power :22mW
Voltage supply: 3.3V

D17IP14 Transceiver
Desert Microtechnology
0.35 μm
XH035
PT
Layout
Schematic

D17IP14 is a low voltage differential signal (LVDS) receiver (RX) for digital video data transfer.  It adherers to LVDS standards.  It has a 400 ohm input impedance. It amplifies the input signals to CMOS levels, 0 to 3.3V. 

AV2102 600mA Buck Voltage Regulator
Aivaka
0.60 µm
XC06
PT
GDSII

DC/DC regulator.

AV2110 600mA Buck Voltage Regulator
Aivaka
0.60 µm
XC06
PT
GDSII

DC/DC Buck Regulator with 0% to 100% duty cycle.

MR74039 Other
Moortec Semiconductor Ltd
0.35 μm
XH035
ID
GDSII
Verilog

The MR74039 is a fully integrated temperature sensor with a 12 Bit digital output designed in the XFab 0.35um XH035 process. It utilises a 12 bit Sigma Delta ADC for increased precision (0.25ºC). The temperature measurement range is fr

AR32X3A ADC
Archband Labs Inc.
0.25 μm
FC025
PT
GDSII

AR32X3A is a 16-bit ADC for measurement purpose in 0.25µm node.

AR25X01 Other
Archband Labs Inc.
0.25 μm
FC025
PT
GDSII

AR25X01 is a 35mA LDO with the capless option in 0.25µm node

VREG1_8 Voltage Regulator
Suter IC-Design AG
0.18 μm
XC018
MP
GDSII
Schematic

Low power voltage regulator for 1.8V logic, requires only an external capacitor, available for XC018/XH018 MOS3LP and MOS5LP, different option available on request.

XTAL5M Crystal Oscillators
Suter IC-Design AG
0.18 μm
XC018
MP
GDSII
Schematic

Low power crystal oscillator for resonator with fast start-up, available for XC018/XH018 MOS3LP, including pads, different pads on request.

Sub 1dB LNA+mixer LNA
Mixer
Saul Research
0.35 μm
XH035
PT
GDSII
Schematic

LNA  and optional mixer based on XH035 process. Measured noise figure below 1dB including mixer. Described in a paper on the web site.  The techniques are readily applied to other processes.

Low Power DDS Other
Saul Research
0.35 μm
XH035
PT
GDSII
Schematic

Novel aproach to Direct Digital Synthesis, using a voltage-ladder reference. Accuracy is achieved by using a full resistor ladder array, so bit size equivalent to 12 bits has been shown. Prototypes using an 8 bit system are available on

 

MP = Mass ProductionPT = Prototyping, Silicon provenID = in DesignVS = Verified by Simulations (Soft-IP)

Displaying results 211 to 240 out of 381

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