285 entries
Published: Mar 2011

A study has been carried out to improve metal-insulator-metal (MIM) capacitor's capacitance density and linearity performance. The scopes of the study included single MiM and stack MIM structures. Different dielectric schemes were evaluated with their corresponding capacitance density, breakdown voltages and linearity coefficient to voltage and temperature variation etc. characterised.


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Published: Sep 2019

Polysilicon is an integral part of many devices in all CMOS process. Very consistent and accurate electrical performance of such material is a need of those devices used in Circuit Under Pad (CUP) applications. This paper presents an investigation on stress impact of probe insertions on two bond pad metal options i.e. METMID and METTHK on a polysilicon resistor placed under the bond pad. Probing results in residual stress on both Back End Of Line (BEOL) as well as Front End Of Line (FEOL) structures. This residual stress would impact the electrical properties of the polysilicon material used in such devices. In this study, such electrical impact is measured in terms of change in resistance of a polysilicon resistor which was placed underneath the bond pads.


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Published: Jan 2011

Miniaturized video endoscopes with an imager located at the distal end and a simplified opto-mechanical layout are presented. They are based on a CMOS imager with 650 x 650 pixels of 2.8 μm pitch and provide straight view with 75° and 110° field of view at f/4.3. They have an outer diameter of 3 mm including the shell and a length of approx. 8 mm. The optics consist of polymer lenses in combination with a GRIN and a dispensed lens. Using a simple flip chip assembly, optical axis alignment better than 10 μm and a contrast of 30 % at 90 LP/mm was achieved. The 75° FOV system was sealed at the front window using a solderjetting technology, providing 10-9 mbar*l/s leakage rates even after several autoclave cycles.


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Published: Jan 2011

Visualization is still the most important tool in medical diagnostics to allow for the physician, in combination with their medical knowledge, to detect diseases within the human body and choose healing treatments in order to enable recovery. For minimal invasive surgical operations that use endoscopic tools, imaging camera modules that have both a small volume and a good resolution are necessary to ensure the success of the surgical treatment.
Microsystem technologies now allow for the direct integration of imaging optics and sensors in a system.


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Published: Dec 2019

In this work we demonstrate application of Al/Ge eutectic vacuum packaging of a CMOS/MEMS wafer to a Cap wafer for infrared sensors. Optimum Al/Ge integration and bonding procedure result into noticeable enhancement of thermopile-pixel responsivity. In addition, critical parameters along process variation, which can be beneficial to other types of CMOS/MEMS devices with variable process integration approaches, are discussed. 


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Published: Jul 2010

A novel 0.18μm 200V integrated technology based on Partial SOI and lateral Super Junctions devices is presented. The dielectric isolation inherent in SOI allows simple and areaefficient integration of electrically floating CMOS and HV devices while removing all substrate carrier injection-related parasitic effects. The Super Junctions give a competitively low on-resistance of HVMOS and provide a wide-range breakdown voltage-scaling capability.


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Published: Apr 2010

An experiment in base and pedestal collector implant has been conducted to study the impact and further improve the performance of a 0.6 micron silicon poly emitter bipolar transistor. It has been shown the bandwidth can be improved form 13GHz to 15GHz with acceptable changes to the other bipolar performances.


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Published: Apr 2010

The high voltage device can be embedded into conventional shallow trench isolation (STI) logic process. Basically, SVX (Smart Voltage Extension) technique was applied in order to integrate 32V high voltage LDMOS into a standard 0.18 micron low voltage CMOS technology without any process change. However, a double hump issue was being observed in high voltage LDNMOS. The double hump phenomenon is mainly occurs due to lower threshold voltage of transistor corner that will lead to high sub-threshold leakage. This paper presents a solution by applying boron implant in HV LDNMOS to suppress the double hump issue. The retrograde baseline CMOS p-well implant is used for this purpose to avoid an additional mask and process step.


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Published: Mar 2010

Sub-wavelength structures in metal films have interesting optical properties that can be implemented for sensing applications: gratings act as wire grid polarizer, hole arrays with enhanced transmission can be used as spectral filters. This paper demonstrates the feasibility of these nanostructures using 180 nm and 90 nm complementary metal-oxide semiconductor (CMOS) processes. The metal layers of the process can be used for optical nanostructures with feature sizes down to 100 nm.


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Published: Mar 2010

For the first time, this paper demonstrates the experimental results for two types of test structures of field transistors up to 200°C. The field transistor structures which are stripe (conventional) and square ring (new) structures were measured and investigated in term of field leakage current and onstate characterization at high temperature.


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