273 entries
Published: Feb 2012

Moore’s law has been a strong influence on mainstream microelectronics over the past few decades, where the trends of decreasing feature size and increasing transistor count have driven the semiconductor industry forward. This philosophy has worked very well for memories and microprocessors in the digital world. Additional analog functions, by interfacing with the physical world, enable cost-optimized and value-added system solutions.


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Published: Feb 2012

PIN photodiodes are often used in optical integrated circuits. Although they can feature a very good RF-performance, this can be effected by the optical power density of the incident light. The influence of this effect on the RF-performance of PIN photodiodes is described. When a critical optical power density in the epi-layer is exceeded the 3dB frequencies are cut off. An analytical equation is derived to describe the effect. The results are compared to RF measurements and verified by numerical simulation.


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Published: Sep 2018

Preventive maintenance activities require a tool to be offline for long hour in order to perform the prescribed maintenance activities. Although preventive maintenance is crucial to ensure operational reliability and efficiency of the tool, long hour of preventive maintenance activities increases the cycle time of the semiconductor fabrication foundry (Fab). Therefore, this activity is usually performed when the incoming Work-in-Progress to the equipment is forecasted to be low.


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Published: Mar 2012

X-FAB, a pure play foundry, has already extensive experience in volume production of monolithic integrated MEMS devices. The idea of combining CMOS and MEMS processes to obtain monolithic integrated sensor solutions is a logical, consequent step following the “More than Moore” strategy.


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Published: Sep 2018

CMOS-MEMS integration is getting a more and more important topic with growing expectations and requirements on the function and performance of micro sensors [1]. The integration of ASICs and memories to MEMS sensor structures allows by calibration the compensation of side effects (temperature influences, stress influences,…) and manufacturing tolerances.


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Published: Dec 2011

Looking for new improvement options such as new dispatching rules of an existing semiconductor fabrication facility, a detailed model is indispensable to check the data quality as well as detecting main influences of the facility and finally testing the new optimization approaches. In this paper, the whole way is described starting from the data acquisition and finishing with a appropriate model. In this study the modeling tool AnyLogic 6 is used. The model generation process show how important a reliable factory database is and shows first appendages of automated model generation. An other important fact presented is the verification of the model according to real factory performance indicators.


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Published: Oct 2018

The optimization of a metal-Schottky source-drain NMOS structure and it’s underlying parasitic lateral BJT has been performed on a 0.18 um feature size BCD power IC process. The metal-Schottky structure is fabricated using an ultra-shallow ion implantation which is capable of modifying the barrier height without the need for introduction of non-standard metal systems into the CMOS fab.


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Published: Oct 2018

Shallow Trench Isolation (STI) is a very critical Chemical Mechanical Polishing (CMP) process that requires an exceptional planarization state and reduction of micro-scratches is highly vital [1-2]. Minimizing defects has been a challenging task in STI CMP in both traditionally fumed silica slurry and advanced colloidal silica slurry process [3-4]. Furthermore, the use of ceria (CeO2) slurry in STI CMP heightens this difficulty as ceria slurry tends to agglomerate exceedingly easily in contrast to fumed silica slurry. Additionally, vulnerability to micro-scratches in polished wafers increase exceptionally when ceria (CeO2) slurry is utilized in STI CMP.


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Published: Dec 2011

Based on specific technology flows, various surface layers are bonded by glass frit wafer bonding. In this paper, the behaviour of typical layers, such as TEOS, Nitride and thermal oxide, and their effect on the bonding results are introduced.


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Published: Jan 2018

Ultrasound solutions are widely used in industrial and medical applications for distance measurements and imaging. A multiplexing switch unit is required to drive a piezoelectric transducer array for imaging by a single ultrasound pulse source. Higher frequencies are required for better image resolution.


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