Substrate Netlist Extraction for First-Time-Right Design - How to Avoid Unwanted Parasitic Effects
presented by Klaus Heinrich, Design Support Engineer, X-FAB Erfurt
Date & Time:
21 August 2019, 9 a.m.
22 August 2019, 6 p.m.
(There will be two sessions. Please register here and select the time that works best for you.)
Have you ever sat in front of your IC layout and asked yourself how you need to place guard rings to mitigate unwanted parasitic effects?
If you take the safe approach you may waste precious layout area which increases the overall footprint of your IC. Just imagine if you could know where peaks of substrate current are in order to effectively predict the parasitic effects for countermeasures. To address this challenge X-FAB has enabled PNAware XSUB – a substrate analysis tool developed by the Swiss EDA software vendor PN Solutions.
In this webinar, we will demonstrate the tool which is enabled by X-FAB’s PDK environment using examples from the 180 nm high-voltage technology (XH018).
Join this webinar and find out how you can save at least one design iteration by detecting and eliminating all adverse substrate effects early enough in the development.
After registering, you will receive a confirmation email containing information about joining the webinar.
View System Requirements for the online classroom