IP Portal

Sel. IP Name Category Provider Geometry Process Name Status Deliverable Description
MR74039 Other
Moortec Semiconductor Ltd
0.35 μm
XH035
ID
GDSII
Verilog

The MR74039 is a fully integrated temperature sensor with a 12 Bit digital output designed in the XFab 0.35um XH035 process. It utilises a 12 bit Sigma Delta ADC for increased precision (0.25ºC). The temperature measurement range is fr

SA00AH8A00 ADC
Sony LSI Design Inc.
0.35 μm
XH035
ID
GDSII

SA00AH8A00 is a subranging 8-bit high-speed 50MS/s Analog-to-Digital Converter(ADC) for video band and disk servo use.

SA00AH8B00 ADC
Sony LSI Design Inc.
0.35 μm
XH035
ID
GDSII

SA00AH8B00 is a subranging  8-bit low-power 25MS/s Analog-to-Digital Converter(ADC) for disk servo use.

SA00PFC000 PLL
Sony LSI Design Inc.
0.35 μm
XH035
ID
GDSII

SA00PFC000 is a PLL with internal loop filter. Wide output clock freq. range : 10MHz~200MHz. Wide input clock freq. range : 2MHz~50MHz

SA00PFC010 PLL
Sony LSI Design Inc.
0.35 μm
XH035
ID
GDSII

SA00PFC010 is a PLL with internal loop filter. Wide output clock freq. range : 10MHz~160MHz. Wide input clock freq. range : 2.5MHz~6MHz.

SA00DJAA00 DAC
Sony LSI Design Inc.
0.35 μm
XH035
ID
GDSII

SA00DJAA00 is a high-speed  50MS/s Digital-to-Analog Converter(DAC) for video band use.

DC-DC Converter DC/DC Converters
Ridgetop Group
0.60 µm
XC06
ID
GDSII

Ultra high efficiency programmable output voltage over wide input voltage range, buck/boost. Input: 1.5V - 15V. Output 2V-6V

PWM Other
Ridgetop Group
0.35 μm
XH035
ID
GDSII

250kHz PWM for DC-DC converters

High V Input Cell Other
Ridgetop Group
0.35 μm
XH035
ID
GDSII

High Voltage Input for input voltages up to 100V

QCBGB10_35X Voltage Regulator
Bias
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII
Schematic

Bandgap Voltage Reference and Current Bias Cell.

QCBIAS1_35X Current Reference
Bias
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII
Schematic

Current Reference and Current Biasing Cell.

QCCMP4_35X Comparators
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII
Schematic

Comparator Cell with N-Channel Inputs

QCDAC4_35X DAC
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII
Schematic

Resistive String architecture.

QCOP4_35X Operational Amplifier
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII
Schematic

Operational Amplifier Cell with P-Channel Inputs

QCOP5_35X Operational Amplifier
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII
Schematic

Reference Amplifier

QCPOR4_35X Power on Reset
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII
Schematic

Power On Reset cell

VREG1_8 Voltage Regulator
Suter IC-Design AG
0.18 μm
XC018
MP
GDSII
Schematic

Low power voltage regulator for 1.8V logic, requires only an external capacitor, available for XC018/XH018 MOS3LP and MOS5LP, different option available on request.

XTAL5M Crystal Oscillators
Suter IC-Design AG
0.18 μm
XC018
MP
GDSII
Schematic

Low power crystal oscillator for resonator with fast start-up, available for XC018/XH018 MOS3LP, including pads, different pads on request.

DT2120 ADC
Digian Technology,Inc.
0.35 μm
XH035
MP
GDSII

The dT2120 is designed featuring low-voltage and low-power mono ADC (Analog-to -Digital Converter) for sensor applications. The ADC architecture is using 4th-order 1bit sigma-delta modulator with 64-times oversampling. The dT2120’s in

CM1112ae Voltage Regulator
chipus
0.35 μm
XH035
MP
GDSII
Verilog
LVS Netlist

General purpose linear voltage regulator. The circuit generates a 3.3V output voltage from an unregulated input voltage ranging from 5V to 30V. It features short circuit protection and 5mA output current capability.

CM1412ae Power on Reset
chipus
0.35 μm
XH035
MP
GDSII
Verilog
LVS Netlist

2Low consumption Power-On Reset (POR) core. The core has a voltage sense (configurable 0.9V - 5.5V), an internal current bias circuit and two configurable assertion delays (default are > 1μs and > 20μs). A configurable hysteresis (default 100mV).

CM1511ae Other
chipus
0.35 μm
XH035
MP
GDSII
Verilog
LVS Netlist

Low consumption combo voltage and current reference core. The circuit generates an unbuffered 1.29V, temperature compensated voltage reference (70ppm/°C) and provides a 1.6μA PMOS current branch (200ppm/°C).

CM4013ae Oscillator
chipus
0.35 μm
XH035
MP
GDSII
Verilog
LVS Netlist

General purpose, low power internal oscillator core, 12MHz. The circuit has internal level shifting and start-up circuits. A 4-bit digital bus allows frequency calibration against process variations. Current consumption <40μA, supply voltage 2.7V-3.6V

aopac01 Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Schematic
Layout
Analog Library

XC10: A_CELLS; A_CELLS_M1. aopac01 is an internally compensated general purpose OpAmp with P-MOS input and common-source output stage.

aopac02 Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. aopac02 is an internally compensated rail-to-rail input/output OpAmp.

aopac03 Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. aopac03 is an internally compensated general purpose OpAmp with N-MOS input and bipolar pnp output stage.

aopac04 Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. aopac04 is a internally compensated general purpose OpAmp with P-MOS input stage.

aopac05 Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. aopac05 is a fast internally compensated OpAmp with P-MOS input stage.

aopac06 Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. aopac06 is a high-gain, high load current CMOS OpAmp with N-MOS input and rail-to-trail output stage.

aopac07 Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. aopac07 is a general purpose internally compensated OpAmp with P-MOS input and source follower output stage.

 

MP = Mass ProductionPT = Prototyping, Silicon provenID = in DesignVS = Verified by Simulations (Soft-IP)

Displaying results 1 to 30 out of 370

*Disclaimer:
The Intellectual Partner Network is a web database provided by X-FAB in cooperation with selected partners. Both X-FAB and a variety of different IP supplier offer their IP to customers using X-FAB’s foundry process. X-FAB will support customers to get in direct contact with the relevant IP supplier.

X-FAB will take no responsibility nor any liability whatsoever for the information or products offered or provided by the other IP suppliers at the database of the Intellectual Partner Network. X-FAB shall have no liability towards the customers for any use of and/or reliance of the products provided by the other IP suppliers at the database of the Intellectual Partner Network.

X-FAB's own IP is subject to a license agreement. X-FAB IP marked with “*” are part of the Master Kit or Master Kit Plus library. If you can not find the IP you are looking for, please contact the respective sales manager in your region. We continuously extend our libraries and offer a custom cell development service as well.