IP Portal

Sel. IP Name Category Provider Geometry Process Name Status Deliverable Description
CM6011ae Other
chipus
0.35 μm
XH035
PT
GDSII
Verilog
LVS Netlist

General purpose capacitive sensor core. The circuit is intended for touch sensing applications for use in microcontrollers and has two multiplexed inputs. 3pF input sensibility and output frequency of 460kHz - 600kHz.

CM6111ae Other
chipus
0.35 μm
XH035
PT
GDSII
Verilog
LVS Netlist

30V/20mA Power Driver/Switch - Two modes of operation: switch or programmable current output; short-circuit protection, over-current detection.

DAC-7bit-0.6u DAC
Ridgetop Group
0.60 µm
XC06
PT
GDSII

Low Power, Wide Supply Range, CMOS, output to pos rail

DC-DC Converter DC/DC Converters
Ridgetop Group
0.60 µm
XC06
ID
GDSII

Ultra high efficiency programmable output voltage over wide input voltage range, buck/boost. Input: 1.5V - 15V. Output 2V-6V

Comparator 0.6u Comparators
Ridgetop Group
0.60 µm
XC06
PT
GDSII

Ultra Low Power, Wide Supply Range, CMOS

BGR 0.6u Bandgaps
Ridgetop Group
0.60 µm
XC06
PT
GDSII

Low Power, Wide Supply Range, CMOS

PWM Other
Ridgetop Group
0.35 μm
XH035
ID
GDSII

250kHz PWM for DC-DC converters

High V Input Cell Other
Ridgetop Group
0.35 μm
XH035
ID
GDSII

High Voltage Input for input voltages up to 100V

ADC12b017kS180nm ADC
Fraunhofer IIS/EAS
0.18 μm
XH018
PT
GDSII
Schematic

Cyclic single ADC, 12bit resolution, 17kSps, 0.5 LSB INL, 12bit ENOB, 50µW power consumption.

ADC12b054kS180nm ADC
Fraunhofer IIS/EAS
0.18 μm
XH018
PT
GDSII
Schematic

Cyclic single ADC, 12bit resolution, 54kSps, 1.6 LSB INL, 10.5bit ENOB, 370µW power consumption

ADC16b013kS180nm ADC
Fraunhofer IIS/EAS
0.18 μm
XH018
PT
GDSII
Schematic

Cyclic single ADC, 16bit resolution, 13kSps, 12.7 bit ENOB, 50µW power consumption

ADC12b020MS350nm ADC
Fraunhofer IIS/EAS
0.35 μm
XH035
PT
GDSII
Schematic

Pipelined ADC, 12bit resolution, 20MSps, 9.6 bit ENOB@2MSps, 9.2 bit ENOB@20MSps,  2 LSB INL, 125mW power consumption

TI-RF-CMP Comparators
Thesys-Intechna
0.60 µm
XT06
VS
GDSII
Schematic

TI-RF-CMP is a low power CMOS RF comparator with 4 ns propagation delay and latch function. ESD protection provided.

TI-RF-DRV Driver
Thesys-Intechna
0.60 µm
XT06
VS
GDSII
Schematic

TI-RF-DRV is a fully differential RF driver for differential signal processing applications. Common-mode level of differential outputs is adjustable that allows to shift easily the input signals for driving single-supply ADCs. ESD protection provided.

TI-RF-MUX Multiplexer
Thesys-Intechna
0.60 µm
XT06
VS
GDSII
Schematic

TI-RF-MUX is a 4-to-1 RF multiplexer designed with an internal current feedback output amplifier whose gain can be adjusted externally. There is a possibility of optional usage of two 4-to-1 devices as one 8-to-1 multiplexer. ESD protection provided.

TI-RF-Switch Analogue Switches
Thesys-Intechna
0.35 μm
XH035
VS
GDSII
Schematic

The TI-RF-Switch is a broad-band dual SPDT analog switch containing two single-pole double-throw switches. Used CMOS technology provides high isolation and low insertion loss at frequencies up to 1 GHz.

TI-16PI/150M ADC
Thesys-Intechna
0.18 μm
XT018
VS
GDSII
Schematic

TI-16PI/150M is a dual-channel fully differential 16-bit ADC with pipelined architecture optimized for high dynamic performance at sample rates up to 180 MSPS.

TI-Manchester Transceiver
Thesys-Intechna
0.60 µm
XT06
VS
GDSII
Schematic

TI-Manchester is a dual data bus transceiver designed for receiving CMOS/TTL Manchester II data, converting it and transmitting through a stepup transformer to the data bus...

ADC12b040MS180nm ADC
Fraunhofer IIS/EAS
0.18 μm
XC018
XH018
MP
GDSII
Schematic

Pipeline ADC, 12bit resolution, 1-40MSps, single-end and fully differential input buffer.

TI-L500 Voltage Regulator
Thesys-Intechna
0.60 µm
XC06
PT
GDSII
Schematic

TI-L500 is a micro-power low dropout linear voltage regulator with fixed 5 V output voltage and input voltage of up to 40 V. ESD protection provided.

ADC15b008kS180nm ADC
Fraunhofer IIS/EAS
0.18 μm
XC018
XH018
MP
GDSII
Schematic

Sigma-Delta-ADC, 15bit, 8-192kS/s sampling rate, up to 4 differential inputs

ADC15b008kS180nm ADC
Fraunhofer IIS/EAS
0.18 μm
XC018
XH018
MP
GDSII
Schematic

Sigma-Delta-ADC, 15bit, 8-192kS/s sampling rate, up to 4 differential inputs

aopac02 Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. aopac02 is an internal frequency-compensated CMOS operational amplifier with p-mos input stage

aopac03 Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. aopac03 is a fast internal frequency-compensated CMOS operational amplifier with p-mos input stage

aopac05 Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. aopac05 is a low power internal frequency-compensated CMOS operational amplifier with nmos input stage

aopac06 Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. aopac06 is an internal frequency-compensated CMOS operational amplifier with n-mos input stage

aopac07 Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. aopac07 is a fast internal frequency-compensated CMOS operational amplifier with n-mos input stage.

aopac09 Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. aopac09 is an internal frequency-compensated CMOS operational amplifier with p-mos input stage and rail-to-rail output stage.

aopac10 Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. aopac10 is an internal frequency-compensated CMOS operational amplifier with rail-to-rail input stage and rail-to-rail output stage.

acmpc01 Comparators
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. acmpc01 is a low-power two-stage CMOS comparator with n-mos input stage and a CMOS-output stage.

 

MP = Mass ProductionPT = Prototyping, Silicon provenID = in DesignVS = Verified by Simulations (Soft-IP)

Displaying results 121 to 150 out of 373

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