IP Portal

Sel. IP Name Category Provider Geometry Process Name Status Deliverable Description
arcoc06_1v8 Oscillator
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V arcoc06_1v8 is a robust 5MHz low-voltage RC oscillator with internal R and C. The cell operates with VDD down to 1.2V. Frequency independent on load capacity.

arcoc07_1v8 Oscillator
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V arcoc07_1v8 is a robust 10MHz RC oscillator with internal R and C. Frequency independent on load capacity.

arcoc08_1v8 Oscillator
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V arcoc08_1v8 is a robust 20MHzRC oscillator with internal R and C. Frequency independent on load capacity.

qrcoc09_1v8 Oscillator
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V arcoc09_1v8 is a robust 40MHz RC oscillator with internal R and C. Frequency independent on load capacity.

arcoc10_1V8 Oscillator
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

 XH018 LP3MOS 1.8V arcoc10_1v8 is a robust 100kHz RC oscillator with internal R and C. Frequency independent on load capacity.

arcoc11_1v8 Oscillator
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V arcoc11_1v8 is a robust 200kHz RC oscillator with internal R and C. Frequency independent on load capacity.

arcoc12_1v8 Oscillator
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V arcoc12_1v8 is a robust 10kHz RC oscillator with internal R and C. Frequency independent on load capacity.

abiac01_3v3 Bias
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V abiac01_3v3 is a general purpose bias cell. the circuit provides bias voltages so that a current of 200nA (approx.) to flow through PMOS with W/L ration of 8µm/10µm and NMOS with W/L ratio of 4µm/20µm.

abiac02_3v3 Bias
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V abiac02_3v3 is a general purpose bias cell. the circuit provides bias voltages so that a current of 2µA (approx.) to flow through PMOS with W/L ration of 10µm/4µm and NMOS with W/L ratio of 6µm/12µm.

abiac03_3v3 Bias
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V abiac03_3v3 is a general purpose bias cell. the circuit provides bias voltages so that a current of 10µA (approx.) to flow through PMOS with W/L ration of 24µm/2µm and NMOS with W/L ratio of 14µm/6µm.

acsoc01_3v3 Current Source
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V acsoc01_3v3 is a compact general purpose current source. The circuit has four outputs that drive currents of 200nA each. The current outputs can be connected in parallel in order to obtain bigger output currents in the 200nA-800nA range.

acsoc02_3v3 Oscillator
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V acsoc02_3v3 is a compact general purpose current source. The circuit has four outputs that drive currents of 1µA; 2µA; 4µA; and 8µA, respectively.

abgpc01_3v3 Bandgaps
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V abgpc01_3v3 is a general purpose bandgap reference with N-well resistors. This bandgap cell also provides reference voltage for some bias cells.

abgpc02_3v3 Bandgaps
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V abgpc02_3v3 is a general purpose bandgap reference with polysilicon resistors.

abgpc04_3v3 Bandgaps
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V abgpc04_3v3 is a low-voltage bandgap reference with N-well resistors.

aopac01_3v3 Operational Amplifier
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V aopac01_3v3 is a general purpose internally compensated CMOS OpAmp with N-MOS input stage and rail-to-rail output stage. The speed, gain bandwidth, and the power consumption of the amplifier are set by means of a bias current.

aopac02_3v3 Operational Amplifier
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V aopac02_3v3 is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and rail-to-rail output stage. The speed, gain bandwidth, and the power consumption of the amplifier are set by means of a bias current.

aopac03_3v3 Operational Amplifier
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V aopac03_3v3 is a general purpose internally compensated CMOS OpAmp with N-MOS input stage and rail-to-rail output stage. The speed, gain bandwidth, and the power consumption of the amplifier are set by means of a bias current.

aopac04_3v3 Operational Amplifier
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V aopac04_3v3 is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and rail-to-rail output stage. The speed, gain bandwidth, and the power consumption of the amplifier are set by means of a bias current.

acmpc01_3v3 Comparators
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V acmpc01_3v3 is a low-power current-programmable CMOS comparator with hysteresis. The input stage is P-MOS differential pair.

acmpc02_3v3 Comparators
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V acmpc02_3v3 is a low-power current-programmable CMOS comparator with hysteresis. The input stage is N-MOS differential pair.

acmpc03_3v3 Comparators
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V acmpc03_3v3 is a low-power current-programmable CMOS comparator.

arcoc01_3v3 Oscillator
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V arcoc01_3v3 is a robust 100kHz RC oscillator with internal R and C. The cell features very low temperature coefficient of clock frequency and low power temperature.

arcoc02_3v3 Oscillator
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V arcoc02_3v3 is a robust 1MHz RC oscillator with internal R and C. The cell features very low temperature coefficient of clock frequency and low power temperature.

arcoc03_3v3 Oscillator
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V arcoc03_3v3 is an adjustable 100kHz, current-balancing RC oscillator with internal R and C. The very low temperature coefficient of the clock frequency combined with trimming inputs, very low power consumption and compact size.

arcoc04_3v3 Oscillator
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V arcoc04_3v3 is an adjustable 1MHz, current-balancing RC oscillator with internal R and C. The very low temperature coefficient of the clock frequency combined with trimming inputs, very low power consumption and compact size.

aadcc01_3v3 ADC
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V aadcc01_3v3 is a 10-bit successive approximation Analog-to-Digital converter. The ADC operates with a single 3.3V analog power supply; 1.8V digital power supply and an external voltage reference.

adacc01_3v3 DAC
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V adacc01_3v3 is a 10-bit voltage-scaling (potentiometric) Digital-to-Analog converter. The adacc01 DAC operates with a single 3.3V analog power supply; a 1.8V digital power supply and an external reference voltage.

aporc02_3v3 Power on Reset
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V aporc02_3v3 is a Power-on-Reset circuit with hysteresis. Reset signal are generated on power-on and power-off transitions. Both high and low (POR and PORB) reset signals are available.

aporc03_3v3 Power on Reset
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V aporc02_3v3 is a Power-on-Reset circuit. Reset signal are generated on power-on and power-off transitions. Both high and low (POR and PORB) reset signals are available.

 

MP = Mass ProductionPT = Prototyping, Silicon provenID = in DesignVS = Verified by Simulations (Soft-IP)

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