10 entries, filtered by: Modeling
Published: June 2011

Photo detector integrated circuits (PDIC) require high-sensitivity and high-bandwidth photo diodes for the latest generation of Blu-ray data storage devices. Due to the very short 405nm wavelength used, carriers are generated close to the surface. Standard photo diodes have only a low sensitivity for blue light. Therefore, special adapted photo diodes are necessary to support sensitivity higher than 0.25A/W for a 405nm wavelength.


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Published: March 2010

Sub-wavelength structures in metal films have interesting optical properties that can be implemented for sensing applications: gratings act as wire grid polarizer, hole arrays with enhanced transmission can be used as spectral filters. This paper demonstrates the feasibility of these nanostructures using 180 nm and 90 nm complementary metal-oxide semiconductor (CMOS) processes. The metal layers of the process can be used for optical nanostructures with feature sizes down to 100 nm.


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Published: October 2009

In this paper we describe a novel tool for modeling the fabrication of MEMS and semiconductor devices, and show some examples of its application in the MEMS foundry business. The tool allows an accurate visualization of the step-by-step crreation of the final 3-D device geometry by using the 2-D layout and a description of the fabrication process.


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Published: July 2008

In this work an attempt is made to extract Dual Pearson moments from 1-D Monte Carlo simulated profiles, and these moments are used for 2-D simulations. This approach gives same accurate implant profile as Monte Carlo, but simulation time is significantly reduced.


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Published: June 2006

High voltage mos transistors usually have a drift zone in the drain region. The conductivity of this drift zone is strongly dependent on the flowing current and gate voltage. Thus it has generally to be modelled with a variable resistance representing the effects on the current. The goal of this work is to show a phenomenological macro model including AC modelling. The model is restricted to a lumped element sub-circuit, which can be processed by a standard spice simulator.


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Published: September 2005

During the evolution of RF bipolar transistors, much efforts were spent to optimize the base design. Device engineers came up with concepts like graded dopant profiles, SiGe and SiGe:C base layers, elevated base structures, etc. Regarding the collector, selectively implanted collectors (SIC) were introduced to increase both the cutoff frequency ft and the maximum frequency of oscillation fmax. In this work we focus on the collector-emitter breakdown voltage BVCE0 and its relation to ft for differently designed SICs of Si-based RF bipolar transistors.


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Published: September 2005

This paper presents the results of a three and a half year R&D project for low cost micromachined gyroscopes. As starting point of this work the application requirements of enhanced automotive applications such as Advanced Driving Assistant Systems (ADAS) are given. Based on these demands the sensor development is carried out.


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Published: June 2012

Sensors are everywhere, serving as an interface between our analog world and the digital world of data processing in electronic systems. Is your design challenge – making sensor output signals available to complex digital systems – further complicated by the need for low noise, temperature-dependent behavior and non-linear effects? If you are looking for solutions for low noise amplification and temperature drift, non-linearity or signal offset compensation, don’t miss this free webinar. It helps designers select the right technology for low-noise and high-precision sensor interfaces. You’ll get tips for achieving excellent matching for robust circuits, and see how X-FAB’s sophisticated modelling enables first-time-right analog and mixed-signal designs.


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Published: September 2013

This webinar session focuses on the importance of proper characterization data for successful analog design, and discusses how modeling and process characterization can make life easier for analog design engineers. It covers statistic modeling approaches, model quality assurance and process calibration.


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Published: July 2014

To meet stringent quality requirements like 0 ppm, it's essential to build in robust quality and verify it during product design development. This webinar will review the impact of manufacturing variations and tolerances in semiconductor processes for zero-failure-quality targets. It will introduce countermeasures like six-sigma design practice, design centering, robustness indicator figures (RIF) and statistical reliability modeling. Quality verification and robustness validation concepts will be discussed, as well as selected quality assurance methods that can be applied in the manufacturing chain.    


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