90 entries, filtered by: CMOS
Published: January 2011

Miniaturized video endoscopes with an imager located at the distal end and a simplified opto-mechanical layout are presented. They are based on a CMOS imager with 650 x 650 pixels of 2.8 μm pitch and provide straight view with 75° and 110° field of view at f/4.3. They have an outer diameter of 3 mm including the shell and a length of approx. 8 mm. The optics consist of polymer lenses in combination with a GRIN and a dispensed lens. Using a simple flip chip assembly, optical axis alignment better than 10 μm and a contrast of 30 % at 90 LP/mm was achieved. The 75° FOV system was sealed at the front window using a solderjetting technology, providing 10-9 mbar*l/s leakage rates even after several autoclave cycles.


More
Published: December 2010

This free webinar introduces X-FAB’s Hall effect sensor device that detects and measures magnetic fields directly on the chip, making magnetic field-sensing design much faster. You’ll learn how the Hall sensor element – available as a completely characterized building block in X-FAB’s 0.18 micrometer modular high-voltage technology, XH018 – can be combined with other features of the XH018 process to enable a broad range of applications. For example, contactless detection or measurement of magnetic fields, and applications in which a magnetic field is used for indirect measurement of distance, position, rotational angle, speed or an electric current.


More
Published: December 2010

The CX06 Series is X-FAB‘s 0.6 Micron Modular Mixed Signal Technology. Main target applications are standard cell, semi-custom and full custom designs for Industrial, Automotive and Telecommunication products.
Based on a state of the art single poly double metal 0.6-micron drawn gate length N-well process for digital application, process modules are available for triple metal and double poly high performance analogue circuits.


More
Published: November 2010

This paper suggests an improved method to round off the concave corners of the deep trenches formed by plasma etch. The corner rounding technique, sacrificial oxidation (SACOX) before gate oxidation, has been practiced on the shallow trench isolation (STI) to improve the CMOS leakage performance.


More
Published: October 2010

In the past five years we have seen a huge step in the evolution of MEMS applications. Some may even call it a revolution. Traditionally, Inkjet printer heads and automotive applications have dominated MEMS volume production. Today, demand for MEMS is particularly high in the consumer and mobile sector with further applications appearing every day. Part of this MEMS revolution has been the changing requirements for associated ASIC CMOS intelligence. Many manufacturers who currently use discrete MEMS devices are now seeing the benefits of integrated CMOS.


More
Published: July 2010

Emerging applications in the field of lithium-ion battery management and Power over Ethernet require operating voltages of up to 100V, robust primitive devices and low on-resistance. X-FAB’s enhanced 0.35 micrometer high-voltage foundry process XH035 offers these features combined with high reliability and a small silicon footprint.


More
Published: April 2010

The integration of full custom analog circuitry into a silicon chip, to provide cost-effective products, requires a full understanding of the process architecture and uses completely different methods compared with those used for digital designs. This webinar briefly covers the digital design arena before entering into in-depth discussion of analog layout techniques. It explores the integration of X-FAB-supported primitive devices into complex integrated chips in detail, including diffusions, wells and associated layers that can be merged. The session also covers derivation of "well" combinations from the design layers, and gives guidelines for high-voltage interconnects across these well regions to avoid parasitic leakage paths.


More
Published: April 2010

The high voltage device can be embedded into conventional shallow trench isolation (STI) logic process. Basically, SVX (Smart Voltage Extension) technique was applied in order to integrate 32V high voltage LDMOS into a standard 0.18 micron low voltage CMOS technology without any process change. However, a double hump issue was being observed in high voltage LDNMOS. The double hump phenomenon is mainly occurs due to lower threshold voltage of transistor corner that will lead to high sub-threshold leakage. This paper presents a solution by applying boron implant in HV LDNMOS to suppress the double hump issue. The retrograde baseline CMOS p-well implant is used for this purpose to avoid an additional mask and process step.


More
Published: March 2010

For the first time, this paper demonstrates the experimental results for two types of test structures of field transistors up to 200°C. The field transistor structures which are stripe (conventional) and square ring (new) structures were measured and investigated in term of field leakage current and onstate characterization at high temperature.


More
Published: March 2010

Sub-wavelength structures in metal films have interesting optical properties that can be implemented for sensing applications: gratings act as wire grid polarizer, hole arrays with enhanced transmission can be used as spectral filters. This paper demonstrates the feasibility of these nanostructures using 180 nm and 90 nm complementary metal-oxide semiconductor (CMOS) processes. The metal layers of the process can be used for optical nanostructures with feature sizes down to 100 nm.


More