31 entries, filtered by: Characterization
Published: December 2015

The SpecXplorer is an online tool for viewing information from the four main specification documents, namely the Design Rule, Process & Device, PCM Acceptance and Process Reliability Specifications. It contains all of the information from these specification documents and has some very useful features so that you can quickly find what you are looking for. This tutorial covers two of the more advanced features of the tool; “Select Modules” and “Select Modules by Devices”. The “Select Modules” feature is very useful, because it allows you to filter the data displayed to just those modules which you are using, or intend to use, in your design. The “Select Modules by Devices” feature allows you first to select the devices you are interested in and then shows you the module combinations which are valid for that selection of devices. Once you have selected a module combination from the available options, it will then filter the data to that selection of modules.


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Published: August 2014

Serial stacking of high voltage devices in a SOI process to achieve higher operating voltages is an alternative approach to layout and material modifications being necessary in a conventional quasi-vertical approach. Based on a sufficient 900 V trench isolation the stacking was first tested with existing lower voltage diodes and compared to new 900 V diodes with the conventional quasi-vertical construction.


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Published: September 2013

This webinar session focuses on the importance of proper characterization data for successful analog design, and discusses how modeling and process characterization can make life easier for analog design engineers. It covers statistic modeling approaches, model quality assurance and process calibration.


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Published: June 2013

Lifetime determination is one of the reliability key tasks to have an accurate estimation of the period of time that can still survive with a certain confidence level under the specific operating conditions to perform the respective function of the applications. Various reliability tests have been designed to reveal and assess the respective wear-out degradation mechanisms.


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Published: January 2013

Classical high voltage devices fabricated on SOI substrates suffer from backside coupling effect which could result in premature breakdown. This phenomenon becomes more prominent if the structure is an IGBT which features a p-type injector. To suppress the premature breakdown due to crowding of electro-potential lines within a confined SOI/buried oxide structure, the partial SOI (PSOI) technique is being introduced. This paper analyzes and characterizes the off-state behaviour of an n-type Superjunction (SJ) LIGBT fabricated on PSOI substrates.


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Published: October 2012

In this paper, optimization and physical scaling of the SONOS ONO triple layer are extensively evaluated, with detailed characterization of the Flash cell behavior. Reliability tests have demonstrated high temperature endurance and long-term data retention. The results have shown that the reliability requirement is attainable even with down scaling of the vertical component of the oxynitride charge trapping layer, which makes it feasible to operate the cell at a lower programming voltage.


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Published: September 2012

Reliability tests assessment are used to evaluate the quality of different process schemes of MIM capacitors. Typically, VRAMP tests can be used to check for extrinsics; which are common and popular method used for evaluating yield issues and early life failures (in which the product failures in ppm level); while TDDB tests are used to determine the intrinsic quality of the capacitor dielectrics; thus the lifetime will be extrapolated accordingly from its dependency from accelerated tests at different higher stress conditions down to the corresponding use condition.


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Published: February 2012

PIN photodiodes are often used in optical integrated circuits. Although they can feature a very good RF-performance, this can be effected by the optical power density of the incident light. The influence of this effect on the RF-performance of PIN photodiodes is described. When a critical optical power density in the epi-layer is exceeded the 3dB frequencies are cut off. An analytical equation is derived to describe the effect. The results are compared to RF measurements and verified by numerical simulation.


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Published: December 2011

Based on specific technology flows, various surface layers are bonded by glass frit wafer bonding. In this paper, the behaviour of typical layers, such as TEOS, Nitride and thermal oxide, and their effect on the bonding results are introduced.


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Published: September 2011

A study on the effect of process fabrication for MIM capacitors analog matching performance was carried out, impacts from the MIM dielectrics, capacitor top and bottom metal materials, capacitor metal etch, wet cleaning, annealing process will be revealed by comparing the Pelgrom coefficients, i.e. the dependence of difference in capacitance of the matching pairs with respect to their corresponding square root of capacitor areas, the smaller the difference the better the matching.


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