34 entries, filtered by: Reliability
Published: July 2014

To meet stringent quality requirements like 0 ppm, it's essential to build in robust quality and verify it during product design development. This webinar will review the impact of manufacturing variations and tolerances in semiconductor processes for zero-failure-quality targets. It will introduce countermeasures like six-sigma design practice, design centering, robustness indicator figures (RIF) and statistical reliability modeling. Quality verification and robustness validation concepts will be discussed, as well as selected quality assurance methods that can be applied in the manufacturing chain.    


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Published: June 2014

First-time-right in analog design depends not only on proper consideration of process variations and design sensitivities but also on device reliability. Device aging can jeopardize performance and long-term product success and therefore should be taken into account as early as possible in the development. This webinar provides an overview of reliability physics and considerations and gives guidance on reliability conscious circuit design. Critical issues are discussed and future options for a reliability-aware design flow are indicated.


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Published: June 2013

Lifetime determination is one of the reliability key tasks to have an accurate estimation of the period of time that can still survive with a certain confidence level under the specific operating conditions to perform the respective function of the applications. Various reliability tests have been designed to reveal and assess the respective wear-out degradation mechanisms.


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Published: October 2012

Hermetic sealing is important regarding functionality and reliability for MEMS components. Typically this sealing is done on the wafer level using wafer bonding which simultaneously also provides mechanical protective caps. However, inner pressure and hermeticity testing and monitoring a still a critical issue; therefore, in this paper a test structure adapted to a MEMS foundry process for inertial sensors is introduced.


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Published: October 2012

By this article an introduction of a highly robust metal track layout especially suitable for high current and temperature applications will be introduced. Starting with the reliability limitations normally observed for wide metal tracks, conclusions regarding the requirements for robust layout techniques will be drawn.


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Published: September 2012

Gate oxide early breakdown was investigated. It was verified that the gate oxide quality is good and failure was due to extrinsic causes. The failure, which was localized at the edge of LOCOS was similar to Kooi effect. However, investigations showed that it was due to nitridation occured during high temperature nitrogen anneal. Investigation methods to find the root cause of failure were explained. Alternative methods to solve the failure were explored; including thickening the sacrificial oxide layer and changing the nitrogen anneal process sequence. Final solution was chosen based on PCM stress test, QBD and TDDB result with minimal process change.


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Published: September 2012

Reliability tests assessment are used to evaluate the quality of different process schemes of MIM capacitors. Typically, VRAMP tests can be used to check for extrinsics; which are common and popular method used for evaluating yield issues and early life failures (in which the product failures in ppm level); while TDDB tests are used to determine the intrinsic quality of the capacitor dielectrics; thus the lifetime will be extrapolated accordingly from its dependency from accelerated tests at different higher stress conditions down to the corresponding use condition.


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Published: April 2012

The article at hand presents the results of thermoelectrical simulations of migration effects in integrated interconnect systems in comparison to measurement data. The simulation concept will be described and the output values as mass flux divergence and time-to-failure (TTF) will be discussed.


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Published: September 2011

For the Synchronous DC-DC converter switching performance of low-voltage power MOSFETs, the gate-drain charge density (Qgd) is an important parameter. The so-called figure-of-merit, which is defined as the product of the specific on-resistance (Ron.sp) and Qgd is commonly used to quantify the switching performance for a specified off-state breakdown voltage (BVds).


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Published: September 2011

Wire Bond Shear (WBS) test is a method for evaluating the strength of a ball bond, to complement wire pull test. In foundry, wafer-level (WLR) WBS provides a quick way to demonstrate the integrity of metal bond pad, backend scheme as well as bond or via design. This is a big challenge for WLR WBS outsourcing as many of the factors affecting shear strength lying on the wire bonding parameters and shear test setup. This paper presents the outsourcing experiences of WBS tests and good shear strength was achieved from the outsource laboratory.


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