NV Latches / EE-Latch / Core EE-Latch
Key Features | |
|---|---|
Application: | Trimming |
Mask adder to core: | 0-7 |
Mask adder to core + HV: | 0-4 |
Erase: | bit |
Write: | bit |
Data Retention: | 10 years @ 85°C |
Endurance: | 10K cycles |
Typical Memory Sizes: | 1 bit–128 bit |
Temperature Range: | -40-125°C |
Compiler: | no |
Automotive Qualification: | yes |
Charge Pump IP: | available |
