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Sel. IP Name Category Provider Geometry Process Name Status Deliverable Description
acmpc10 * Comparators
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. acmpc10 is a CMOS comparator with rail-to-rail input stage and rail-to-rail output stage.

acmpc11 * Comparators
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. acmpc11 is low offset CMOS comparator with rail-to-rail input stage and rail-to-rail output stage.

abgpc01 * Bandgaps
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. abgpc01 is a Brokaw, general-purpose bandgap reference source with high resistive poly resistor. 

abgpc03 * Bandgaps
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. abgpc03 is a badgap reference with high resistive poly resistor.

abiac01 * Bias
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. abiac01 is a bias voltage source (VBP1, VBN1) which needs a bandgap cell for biasing.

abiac02 * Bias
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. abiac02 is a bias voltage source (VBP2, VBN2) which needs a bandgap cell for biasing.

abiac03 * Bias
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. abiac03 is a bias voltage source (VBP3, VBN3) which needs a bandgap cell for biasing.

ADC10 * ADC
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. ADC10 is a 10-bit analog-to-digital converter which utilizes successive approximation technique.

ADC8 * ADC
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. ADC8 is a 8-bit analog-to-digital converter which utilizes successive-approximation technique.

DAC10 * DAC
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. DAC10 is a 10-bit digital-to-analog converter. The architecture is based on two resistor dividers. Because of its high output impedance, which is also code dependent, a low offset buffer operational amplifier is strictly recommended at the

DAC8 * DAC
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. DAC8 is a 8-bit digital-to-analog converter. The architecture is based on two resistor dividers. Because of its high output impedance, which is also code dependent, a low offset buffer operational amplifier is strictly recommended at the ou

DAC8rs * DAC
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. DAC8rs is a 8-bit digital-to-analog converter. The architecture is based on a resistor divider. The output impedance is code dependent.

DAC6rs * DAC
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. DAC6rs is a 6-bit digital-to-analog converter. The architecture is based on a resistor divider. The output impedance is code dependent.

aopac13 * Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS_HV. aopac13 is a high-voltage (VDD up to 10V), low-power, internally-compensated CMOS OpAmp with PMOS input stage.

aopac14 * Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. aopac14 is a high-voltage (VDD up to 10V), low-power, internally-compensated CMOS OpAmp with NMOS input stage.

aopac15 * Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. aopac15 is a high-voltage, internally-compensated CMOS OpAmp with NMOS input stage and bipolar emitter-follower output. The incorporated level shifters allow the EN and ENB inputs to be controlled by 5V circuitry.

abiac07 * Bias
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. abiac07 is a high-voltage bias cell. The circuit forces a current of 2µA (approx.) to flow through pghv PMOS with W/L ratio of 10µm/10µm and nmv NMOS with W/L ratio of 10µm/12µm.

abiac08 * Bias
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. abiac08 is a high-voltage bias cell. THe circuit forces a current of 2µA (approx.) to flow through pgmv PMOS with W/L ratio of 10µm/10µm and nhv NMOS with W/L ratio od 10µm/12µm. The cell features low-cost process option and is a co

adrvc01 * Driver
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. adrvc01 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (high-side switch). High input voltage makes the output go low (connected to ground). The rising slope of the output signal c

adrvc02 * Driver
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. adrvc02 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (low-side switch). High input voltage makes the output go low (connected to ground).

adrvc03 * Driver
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. adrvc03 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (high-side switch). High input voltage makes the output go low (connected to ground). The rising slope of the output signal c

aopac01 * Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aopac01 is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and source follower output stage.

aopac02 * Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac02 is a fast internally compensated CMOS OpAmp with N-MOS input stage and rail-to-rail output stage. Due to the dynamic biasing of the input stage, a high slew rate is achieved, while power consumption is kept moderate.

aopac03 * Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac03 is a general purpose internally compensated CMOS OpAmp with N-MOS input stage and bipolar emitter follower output stage.

aopac06 * Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac06 is a general purpose internally compensated CMOS OpAmp with N-MOS input stage and rail-to-rail output stage.

aopac07 * Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac07 is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and rail-to-rail output stage.

aopac08 * Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac08 is a general purpose internally compensated rail-to-rail input, rail-to-rail output OpAmp.

aopac09 * Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac09 is a fast internally compensated CMOS OpAmp with N-MOS input stage and P-MOS source follower at the output stage.

aopac10 * Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac10 is a fast internally compensated CMOS OpAmp with P-MOS input stage and N-MOS source follower at the output stage.

aopac11 * Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac11 is a low-power, internally compensated CMOS OpAmp with P-MOS input stage and N-MOS source follower at the output stage.

 

MP = Mass ProductionPT = Prototyping, Silicon provenID = in DesignVS = Verified by Simulations (Soft-IP)

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