171 entries
Published: May 2015

With 2015 designated as “Year of the Light” by UNESCO, X-FAB will reflect this theme with a free webinar in May about its integrated photo diodes that span the light spectrum from ultra-violet to infra-red. Come learn the challenges of supporting all parts of the spectrum with highly sensitive photo diodes. See how various photo diode structures compare in terms of light sensitivity, dark current and capacitance. Find out how to select the right devices for your optical sensor applications.


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Published: May 2015

This paper presents a new SOI BCD technology at the 0.18μm node to fulfill the requirements for smart power IC technology targeted for automotive application. Built on a 1.8V and 5.0V CMOS core, there are 40V and 60V rated N/Pch MOS, with 25mΩ.mm2 RonA/57V BVdss having been achieved for the 40V NMOS with excellent process stability.


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Published: March 2015

An increasing number of applications such as automotive engine management require electronic systems which operate reliably at temperatures above 150°C. Designers are facing the challenges of dealing with changes in electrical characteristics, higher leakage current and thermally accelerated degradation.This webinar looks at the device physics, electrical properties of MOSFETs and NVMs, and degradation mechanisms at elevated temperatures up to 200°C. It will discuss the behaviour of CMOS when it is operated at higher temperatures and how the issues which arise can be mitigated by process architecture and design techniques. In addition, X-FAB’s broad portfolio of bulk and SOI CMOS processes for use at high temperatures up to 225°C will be presented.


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Published: March 2015

The design of a system containing integrated MEMS is still a task which requires deep knowledge of the MEMS process itself. Even with the availability of COT MEMS foundry processes, which support the design of MEMS according to process-specific design rules, the quality of results heavily depends on the skills and know-how of the involved designers. Reasons for this are the lack of a sufficient design automation, which would implement and verify parts of the expert knowledge, as well as the missing process abstraction, which would encapsulate the foundry-specific rules and parameters.


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Published: March 2015

For gate driver ICs in three phase power applications level shifters with more than 900V operating voltage are required. The extension of the voltage rating of an existing trench isolated SOI process was done with different device concepts: Serial stacking of lower voltage devices was evaluated as an alternative approach to conventional quasi-vertical and charge compensated lateral devices which need layout and material modifications. 


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Published: September 2014

For a high robust metallization it is necessary to solve different problems related to migration mechanisms and thermo-mechanical stress in the material. Extended operating conditions and challenging assembling processes influence stress behaviour in chip corners. Typically the corner area of the chip is excluded for use. For higher stress load the forbidden area increases. But effort for demanding mission profiles of a product should not cumulative in increasing chip size. Simulation can help to a better understanding of mechanical stress in the chip corner and chip-package interaction.


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Published: September 2014

The miniaturization process of CMOS components creates new challenges for the development of integrated circuits. Especially the connections with a tungsten via between two metal layers can be a problem. Changes in geometry can bear on reliability problems. For a robust metallization design it is necessary to know, how strong the influence of the tungsten via alignment affects the physical behavior. 


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Published: August 2014

Serial stacking of high voltage devices in a SOI process to achieve higher operating voltages is an alternative approach to layout and material modifications being necessary in a conventional quasi-vertical approach. Based on a sufficient 900 V trench isolation the stacking was first tested with existing lower voltage diodes and compared to new 900 V diodes with the conventional quasi-vertical construction.


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Published: July 2014

To meet stringent quality requirements like 0 ppm, it's essential to build in robust quality and verify it during product design development. This webinar will review the impact of manufacturing variations and tolerances in semiconductor processes for zero-failure-quality targets. It will introduce countermeasures like six-sigma design practice, design centering, robustness indicator figures (RIF) and statistical reliability modeling. Quality verification and robustness validation concepts will be discussed, as well as selected quality assurance methods that can be applied in the manufacturing chain.    


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Published: June 2014

First-time-right in analog design depends not only on proper consideration of process variations and design sensitivities but also on device reliability. Device aging can jeopardize performance and long-term product success and therefore should be taken into account as early as possible in the development. This webinar provides an overview of reliability physics and considerations and gives guidance on reliability conscious circuit design. Critical issues are discussed and future options for a reliability-aware design flow are indicated.


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