34 entries, filtered by: Reliability
Published: November 2008

The work presented here show the impact of different reticle transmission ratio (macro pattern density) to metal profile and CD bias of metal etch process. These impacts are due to macro loading and passivation effects differ when pattern density at wafer level changed. We also try to investigate the impact of passivation gas to above phenomenon.


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Published: November 2008

The work presented here shows a change in migration behaviour of a transferred AlCu metallization system. Different failure mechanisms in metallization are known. Migration effects like electro-, thermo- and stress migration are the main failure mechanisms in a metallization. This study shows the detection and exploration of a significant change in the migration mechanism of a wide lines of a top level interconnect of a standard metallization. The study demonstrates the differences of the transferred metallization system and the influence for the degradation behaviour and reliability.


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Published: November 2008

Wafer Level Reliability Gate Oxide Integrity tests such as voltage-ramped and constant current stress have been conducted on area plate-type, poly edge and STI edge intensive test structures. The WLR tests are required for qualifying the process of integrating 3.3 nm and 12.5 nm dual gate oxide operated under the bias of 1.8V and 5V respectively on a single chip.


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Published: November 2008

Several methods have been investigated for gettering impurities during CMOS processing, in order to achieve high-quality oxides on thick SOI. The use of buried implants, buried polysilicon, surface implants, and isolation trenches was found to significantly improve the oxide quality in each case


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Published: July 2008

With the further scaling down of CMOS devices, hot carrier induced degradation has become one of the most important reliability concerns. In the hot carrier effect, carriers are accelerated by the channel electric fields and become trapped in the oxide. These trapped charges cause time dependent shifts in measured device parameters.


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Published: July 2008

Hot carriers, the high kinetic energy carriers due to high electric field in the channel region, are injected into the gate oxide and form interface states, which in turns causes degradation of MOS device performance. The hot carrier effect has become more severe as the device size continues to scale down to submicron range. This aging phenomenon that threatens the circuit and product lifetimes warrants it to be considered as the key challenge in reliability.


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Published: July 2008

Experimental condition of thin SAB Oxide around 350Å coupling with 400Å Contact SiON film has exhibited the worst data retention behavior in One Time Programmable (OTP) & Multiple Time Programmable (MTP) memory device.


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Published: May 2008

The long term isolation properties of deep trenches in thick SOI have been investigated by current-voltage characteristics. A strong change of the measured trench leakage current was observed depending on the applied voltage. Further on a marked decrease of the leakage current was observed depending on the duration and polarity of the applied stress.


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Published: December 2007

Ultra low power device requires extremely low level of CMOS standby current leakage. At 0.15um geometric technology, wafer edge leakage current is more severe yield issue and it was suspected from inter metal dielectric thickness and contact module process uniformity. Investigation has been made and our studies have been carried out on process optimization of contact module which are including contact etch tools performance, contact stopper materials, thickness and contact etch time. By implementing the optimized condition, we are able to reduce standby leakage current on wafer edge dice about 5 times reduction.


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Published: December 2007

Today three different main failure mechanisms in metallization are well known. Defect behaviour in reliability stress tests of metallization are influenced by electromigration (current), stress migration (mechanical) and thermomigration (temperature) effects. In this study, stress migration effects were evaluated using high temperature storage test and resistance measurements over time.


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