36 entries, filtered by: Analog
Published: September 2011

A study on the effect of process fabrication for MIM capacitors analog matching performance was carried out, impacts from the MIM dielectrics, capacitor top and bottom metal materials, capacitor metal etch, wet cleaning, annealing process will be revealed by comparing the Pelgrom coefficients, i.e. the dependence of difference in capacitance of the matching pairs with respect to their corresponding square root of capacitor areas, the smaller the difference the better the matching.


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Published: June 2011

XO035 is X-FAB’s specialized process for optoelectronic and high speed RF applications. It is especially suited for applications needing sensitive high bandwidth photo diodes arrays or CMOS image sensors for such applications as optical data storage, optical data communication or high dynamic range cameras.


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Published: April 2011

The XT06 Series completes X-FAB's 0.6 Micron Modular Mixed Signal Technology.
XT06 uses dielectric isolation on SOI wafers. This allows unrestricted 60 V high and low side operation of all devices. The process offers reduced parasitics which results in smaller crosstalk, reduced noise and better EMC characteristics. Thus XT06 allows innovative circuit design with reduced circuit complexity. CMOS as well as Bipolar Transistors are available with breakdown voltages up to 110V.
The 5 V CMOS core is compatible in design rules and transistor performance with state of the art 0.6μm CMOS processes.
For analog applications several capacitor and resistor devices are realized, using the double-poly architecture.


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Published: March 2011

A study has been carried out to improve metal-insulator-metal (MIM) capacitor's capacitance density and linearity performance. The scopes of the study included single MiM and stack MIM structures. Different dielectric schemes were evaluated with their corresponding capacitance density, breakdown voltages and linearity coefficient to voltage and temperature variation etc. characterised.


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Published: February 2011

The CX08 Series is X-FAB‘s 0.8 Micron Modular Mixed Signal Technology. Main target applications are standard cell, semi-custom and full custom designs for Industrial, Telecommunication and Automotive products - including the 42V board net.
Based on a state of the art single poly double metal 0.8-micron drawn gate length N-well process for digital application, various process modules are available for high performance analogue and high voltage circuits.


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Published: December 2010

The CX06 Series is X-FAB‘s 0.6 Micron Modular Mixed Signal Technology. Main target applications are standard cell, semi-custom and full custom designs for Industrial, Automotive and Telecommunication products.
Based on a state of the art single poly double metal 0.6-micron drawn gate length N-well process for digital application, process modules are available for triple metal and double poly high performance analogue circuits.


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Published: August 2010

The XHB06 is X-FAB's 0.6 Micron High-Voltage Bipolar CMOS DMOS (BCD) Technology, optimized for applications requiring operating voltages of 5V to 30V. Main target applications are power management, RF circuits and high precision analog applications mixed with digital parts for Telecommunication, Consumer, Automotive and Industrial products. The digital part is fully compatible with X-CMOS 0.6 process family.


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Published: July 2010

A novel 0.18μm 200V integrated technology based on Partial SOI and lateral Super Junctions devices is presented. The dielectric isolation inherent in SOI allows simple and areaefficient integration of electrically floating CMOS and HV devices while removing all substrate carrier injection-related parasitic effects. The Super Junctions give a competitively low on-resistance of HVMOS and provide a wide-range breakdown voltage-scaling capability.


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Published: April 2010

The integration of full custom analog circuitry into a silicon chip, to provide cost-effective products, requires a full understanding of the process architecture and uses completely different methods compared with those used for digital designs. This webinar briefly covers the digital design arena before entering into in-depth discussion of analog layout techniques. It explores the integration of X-FAB-supported primitive devices into complex integrated chips in detail, including diffusions, wells and associated layers that can be merged. The session also covers derivation of "well" combinations from the design layers, and gives guidelines for high-voltage interconnects across these well regions to avoid parasitic leakage paths.


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Published: April 2010

The high voltage device can be embedded into conventional shallow trench isolation (STI) logic process. Basically, SVX (Smart Voltage Extension) technique was applied in order to integrate 32V high voltage LDMOS into a standard 0.18 micron low voltage CMOS technology without any process change. However, a double hump issue was being observed in high voltage LDNMOS. The double hump phenomenon is mainly occurs due to lower threshold voltage of transistor corner that will lead to high sub-threshold leakage. This paper presents a solution by applying boron implant in HV LDNMOS to suppress the double hump issue. The retrograde baseline CMOS p-well implant is used for this purpose to avoid an additional mask and process step.


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