28 entries, filtered by: SOI
Published: May 2015

This paper presents a new SOI BCD technology at the 0.18μm node to fulfill the requirements for smart power IC technology targeted for automotive application. Built on a 1.8V and 5.0V CMOS core, there are 40V and 60V rated N/Pch MOS, with 25mΩ.mm2 RonA/57V BVdss having been achieved for the 40V NMOS with excellent process stability.


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Published: March 2015

An increasing number of applications such as automotive engine management require electronic systems which operate reliably at temperatures above 150°C. Designers are facing the challenges of dealing with changes in electrical characteristics, higher leakage current and thermally accelerated degradation.This webinar looks at the device physics, electrical properties of MOSFETs and NVMs, and degradation mechanisms at elevated temperatures up to 200°C. It will discuss the behaviour of CMOS when it is operated at higher temperatures and how the issues which arise can be mitigated by process architecture and design techniques. In addition, X-FAB’s broad portfolio of bulk and SOI CMOS processes for use at high temperatures up to 225°C will be presented.


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Published: March 2015

For gate driver ICs in three phase power applications level shifters with more than 900V operating voltage are required. The extension of the voltage rating of an existing trench isolated SOI process was done with different device concepts: Serial stacking of lower voltage devices was evaluated as an alternative approach to conventional quasi-vertical and charge compensated lateral devices which need layout and material modifications. 


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Published: August 2014

Serial stacking of high voltage devices in a SOI process to achieve higher operating voltages is an alternative approach to layout and material modifications being necessary in a conventional quasi-vertical approach. Based on a sufficient 900 V trench isolation the stacking was first tested with existing lower voltage diodes and compared to new 900 V diodes with the conventional quasi-vertical construction.


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Published: September 2013

Showing first-time-right performance statistics from X-FAB's customer base, this first session outlines the challenges involved in achieving first-time-right analog designs. It talks about what impact the choice of process architecture makes, and discusses the pros and cons of different process architectures including SOI and BCD.


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Published: July 2013

For most devices sitting on SOI wafer, there is a consideration of backside coupling effect. This phenomenon becomes catastrophic if the device sits on the SOI wafer is an IGBT which consists n-p-n-p structure and employs both the partial SOI and DTI technique. Earlier leakage had been found during development of 200V superjunction lateral IGBT (SJ LIGBT) on partial SOI.


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Published: July 2013

XDH10 is X-Fab´s dielectric trench insulated smart power technology. Main target applications are analog switch ICs, driver ICs for capacitive, inductive and resistive loads and EL / piezo driver ICs for applications using 220V net supply. The typical breakdown voltage of the HV DMOS devices is >350V or >650V. The modular process combines DMOS, bipolar and CMOS processing steps that are compatible with dielectric insulation to provide a wide variety of MOS and bipolar devices with different voltage levels within a dielectric bi-directional high voltage trench insulation on the same die.


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Published: May 2013

This paper demonstrates a novel lateral superjunction (SJ) lateral insulated gate bipolar transistor (LIGBT) fabricated in 0.18μm partial silicon on insulator (PSOI) HV process. The results presented are based on extensive experimental measurements and numerical simulations.


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Published: May 2013

This paper presents versatile HV lateral JFET design method on 0.18μm SOI BCD technology to achieve variable Vth(pinch-off voltage) and Idsat, without DIBL effect over full operating Vds range and scalable breakdown voltage capability on both N-ch and P-ch JFET. The significant advantage of a HV JFET compared to depletion MOSFET is the lower area consumption in real circuit design which due to higher Idsat values at Vgs=0V.


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Published: January 2013

The XT018 series is X-FAB’s 0.18 micron Modular High-voltage SOI CMOS Technology. Based on SOI wafers and the industrial standard single poly with up to six metal layers 0.18-micron drawn gate length process, integrated with high voltage and Non-Volatile-Memory modules, the platform is specifically designed for a new generation of cost-effective "Super Smart Power" technology; operating in temperature range of -40 to 175 °C.


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