IP Portal

Sel. IP Name Category Provider Geometry Process Name Status Deliverable Description
adacc03 DAC
X-FAB
0.60 µm
XT06
PT
Layout
Schematic
Analog Library

XT06

adc10 ADC
X-FAB
0.80 µm
CX08
PT
Analog Library
Layout
Schematic

CX08A: Analog library. ADC10 is a 10-bit analog-to-digital converter which utilizes successive approximation technique.

ADC10 ADC
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. ADC10 is a 10-bit analog-to-digital converter which utilizes successive approximation technique.

ADC12DR ADC
A3PICs GmbH
0.60 µm
XB06
PT
GDSII

The ADC12DR is a SAR-based low-power ADC with a 12bit resolution. Its fully differential input stage features a rail-to-rail input range. At a sampling rate of 2MS/s a power consumption of only 10mW is attained applying a 5V power suppl

adc8 ADC
X-FAB
0.80 µm
CX08
PT
Schematic
Layout
Analog Library

CX08A: Analog library. ADC8 is a 8-bit analog-to-digital converter which utilizes successive-approximation
technique.

ADC8 ADC
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. ADC8 is a 8-bit analog-to-digital converter which utilizes successive-approximation technique.

adrvc01 Driver
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. adrvc01 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output. The rising slope of the output signal can be controlled by means of a bias current.

adrvc01 Driver
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. adrvc01 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (high-side switch). High input voltage makes the output go low (connected to ground). The rising slope of the output signal c

adrvc02 Driver
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. adrvc02 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (low-side switch). High input voltage makes the output go low (connected to ground).

adrvc02 Driver
X-FAB
0.35 μm
XH035
PT
Schematic
Layout
Analog Library

XH035: A_CELLS_HV. For MOS module only. adrvc02 is a driver circuit for external loads (relays, LEDs, etc). The circuit features PNOS open-drain output (high-side switch). The layout of adrvc02 makes it easy to incorporate in the flat IO ring.

adrvc03 Driver
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS_HV. adrvc03 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (high-side switch). High input voltage makes the output go low (connected to ground). The rising slope of the output signal c

adrvc03 Driver
X-FAB
0.35 μm
XH035
PT
Schematic
Layout
Analog Library

XH035: A_CELLS_HV. For MOS module only. adrvc03 is a driver circuit for external loads (realys, LEDs, etc). The circuit features NMOS open-drain output (low-side switch). The layout of adrvc03 makes it easy to incorporate in the flat IO ring.

Analogue SSB Chip Other
Saul Research
0.35 μm
XH035
PT
GDSII
Schematic

Very low power (3V, 25uA) 90 degree analogue phase shifter for SSB encoding/decoding. A full description is on the web site, with all measurements.

aopac01 Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Schematic
Layout
Analog Library

XC10: A_CELLS; A_CELLS_M1. aopac01 is an internally compensated general purpose OpAmp with P-MOS input and common-source output stage.

aopac01 Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Schematic
Layout
Analog Library

XB06: A_CELLS. aopac01 is a low power internal frequency-compensated CMOS operational amplifier with pmos input stage

aopac01 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic
Layout
Analog Library

XC06: A_CELLS. aopac01 is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and source follower output stage.

aopac01 Operational Amplifier
X-FAB
0.35 μm
XH035
PT
Layout
Schematic
Analog Library

XH035: A_CELLS. For MOS module only. aopac01 is a general purpose internally compensated CMOS OpAmp with N-MOS input stage and rail-to-tail output stage.

aopac01 Operational Amplifier
X-FAB
0.60 µm
XT06
PT
Layout
Schematic
Analog Library

XT06 aopac01 is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and source follower output stage.

aopac01_3v3 Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aopac01_3v3 is a general purpose internally compensated CMOS OpAmp with N-MOS input stage and rail-to-rail output stage. The speed, gain bandwidth, and the power consumption of the amplifier are set by means of a bias current.

aopac01_3v3 Operational Amplifier
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V aopac01_3v3 is a general purpose internally compensated CMOS OpAmp with N-MOS input stage and rail-to-rail output stage. The speed, gain bandwidth, and the power consumption of the amplifier are set by means of a bias current.

aopac01_5v Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 5V aopac01_5v is a general purpose internally compensated CMOS OpAmp with N-MOS input stage and rail-to-rail output stage. The speed, gain bandwidth, and the power consumption of the amplifier are set by means of bias current.

aopac02 Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. aopac02 is an internally compensated rail-to-rail input/output OpAmp.

aopac02 Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout
Schematic
Analog Library

XB06: A_CELLS. aopac02 is an internal frequency-compensated CMOS operational amplifier with p-mos input stage

aopac02 Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aopac02 is a fast internally compensated CMOS OpAmp with N-MOS input stage and rail-to-rail output stage. Due to the dynamic biasing of the input stage, a high slew rate is achieved, while power consumption is kept moderate.

aopac02 Operational Amplifier
X-FAB
0.35 μm
XH035
PT
Layout
Schematic
Analog Library

XH035: A_CELLS. For MOS module only. aopac02 is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and rail-to-rail output stage.

aopac02 Operational Amplifier
X-FAB
0.60 µm
XT06
PT
Layout
Schematic
Analog Library

XT06 aopac02 is a fast internally compensated CMOS OpAmp with N-MOS input stage and rail-to-rail output stage.

aopac02_3v3 Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aopac02_3v3 is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and rail-to-rail output stage. The speed, gain bandwidth, and the power consumption of the amplifier are set by means of bias current.

aopac02_3v3 Operational Amplifier
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 3.3V aopac02_3v3 is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and rail-to-rail output stage. The speed, gain bandwidth, and the power consumption of the amplifier are set by means of a bias current.

aopac02_5v Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 5V aopac02_5v is a general purpose internally compensated CMOS OpAmp withP-MOS input stage and rail-to-rail output stage. The speed, gain bandwidth, and the power consumption of the amplifier are set by means of bias current.

aopac03 Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. aopac03 is an internally compensated general purpose OpAmp with N-MOS input and bipolar pnp output stage.

 

MP = Mass ProductionPT = Prototyping, Silicon provenID = in DesignVS = Verified by Simulations (Soft-IP)

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