XTAL5M
Crystal Oscillators
Suter IC-Design AG
0.18 μm
XC018
MP
GDSII Schematic
Low power crystal oscillator for resonator with fast start-up, available for XC018/XH018 MOS3LP, including pads, different pads on request.
VREG1_8
Voltage Regulator
Suter IC-Design AG
0.18 μm
XC018
MP
GDSII Schematic
Low power voltage regulator for 1.8V logic, requires only an external capacitor, available for XC018/XH018 MOS3LP and MOS5LP, different option available on request.
SUPI4
Soft IP
MAZeT Gmbh
All Geometries
All Processes
VS
VHDL
Interbus Slave Controller Version 4. Visit MAZeT website for datasheet.
Sub 1dB LNA+mixer
LNA Mixer
Saul Research
0.35 μm
XH035
PT
GDSII Schematic
LNA and optional mixer based on XH035 process. Measured noise figure below 1dB including mixer. Described in a paper on the web site. The techniques are readily applied to other processes.
SA00PFC010
PLL
Sony LSI Design Inc.
0.35 μm
XH035
ID
GDSII
SA00PFC010 is a PLL with internal loop filter. Wide output clock freq. range : 10MHz~160MHz. Wide input clock freq. range : 2.5MHz~6MHz.
SA00PFC000
PLL
Sony LSI Design Inc.
0.35 μm
XH035
ID
GDSII
SA00PFC000 is a PLL with internal loop filter. Wide output clock freq. range : 10MHz~200MHz. Wide input clock freq. range : 2MHz~50MHz
SA00DJAA00
DAC
Sony LSI Design Inc.
0.35 μm
XH035
ID
GDSII
SA00DJAA00 is a high-speed 50MS/s Digital-to-Analog Converter(DAC) for video band use.
SA00AH8B00
ADC
Sony LSI Design Inc.
0.35 μm
XH035
ID
GDSII
SA00AH8B00 is a subranging 8-bit low-power 25MS/s Analog-to-Digital Converter(ADC) for disk servo use.
SA00AH8A00
ADC
Sony LSI Design Inc.
0.35 μm
XH035
ID
GDSII
SA00AH8A00 is a subranging 8-bit high-speed 50MS/s Analog-to-Digital Converter(ADC) for video band and disk servo use.
RINGVCO1 *
VCO
X-FAB
0.60 µm
XB06
PT
Schematic Layout Analog Library
XB06: LNA library: RF_VCO_CELLS. RINGVCO1 is a fully integrated VCO. It should be biased by the RF bias cell. It consists of a ringoscillator that is tuned by switching the delay chain between 2 and 4 delay stages. The transition between the two borders i
qrcoc09_1v8 *
Oscillator
X-FAB
0.18 μm
XH018
PT
Analog Library Layout Schematic
XH018 LP3MOS 1.8V arcoc09_1v8 is a robust 40MHz RC oscillator with internal R and C. Frequency independent on load capacity.
QCPOR4_35X
Power on Reset
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII Schematic
Power On Reset cell
QCOP5_35X
Operational Amplifier
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII Schematic
Reference Amplifier
QCOP4_35X
Operational Amplifier
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII Schematic
Operational Amplifier Cell with P-Channel Inputs
QCDAC4_35X
DAC
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII Schematic
Resistive String architecture.
QCCMP4_35X
Comparators
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII Schematic
Comparator Cell with N-Channel Inputs
QCBIAS1_35X
Current Reference Bias
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII Schematic
Current Reference and Current Biasing Cell.
QCBGB10_35X
Voltage Regulator Bias
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII Schematic
Bandgap Voltage Reference and Current Bias Cell.
QCADB5_35X
Other
QualCore Logic, Inc.
0.35 μm
XH035
PT
GDSII Schematic
Connectivity IP. This is a product chip.
PWM
Other
Ridgetop Group
0.35 μm
XH035
ID
GDSII
250kHz PWM for DC-DC converters
PA *
Power Amplifiers
X-FAB
0.60 µm
XB06
PT
Schematic Layout Analog Library
XB06: LNA library: RF_PA_CELLS. PA is a non-linear Power Amplifier that is intended for the transmission of ASK and FSK signals. Its output power level can be digitally controlled in 4 steps. It should be biased by the RF bias cell.
OEIC_Sensitive *
Optical Receiver Channel
X-FAB
0.60 µm
XB06
PT
Schematic Layout Analog Library
XB06: OEIC Building Block Library. OEIC_Sensitive is a sensitive DVD receiver channel with two selectable gain settings. Can be integrated with photodiode to form a complete optical receiver channel optimized for 660nm wavelengths.
OEIC_Fast *
Optical Receiver Channel
X-FAB
0.60 µm
XB06
PT
Schematic Layout Analog Library
XB06: OEIC Building Block Library. OEIC_Fast is a fast DVD receiver channel with two selectable gain settings. Can be integrated with photodiode to form a complete optical receiver channel optimized for 660nm wavelengths.
MR74039
Other
Moortec Semiconductor Ltd
0.35 μm
XH035
ID
GDSII Verilog
The MR74039 is a fully integrated temperature sensor with a 12 Bit digital output designed in the XFab 0.35um XH035 process. It utilises a 12 bit Sigma Delta ADC for increased precision (0.25ºC). The temperature measurement range is fr
MIXER *
Mixer
X-FAB
0.60 µm
XB06
PT
Schematic Layout Analog Library
XB06: LNA library: RF_MIXER_CELLS. MIXER is a down conversion mixer based on a Gilbert cell topology. It should be biased by the RF bias cell.
Low Power DDS
Other
Saul Research
0.35 μm
XH035
PT
GDSII Schematic
Novel aproach to Direct Digital Synthesis, using a voltage-ladder reference. Accuracy is achieved by using a full resistor ladder array, so bit size equivalent to 12 bits has been shown. Prototypes using an 8 bit system are available on
LNA3 *
LNA
X-FAB
0.60 µm
XB06
PT
Schematic Layout Analog Library
XB06: LNA library: RF_LNA_CELLS. LNA3 is a low noise amplifier with on-chip inductor. It should be biased by the RF bias cell.
LNA2 *
LNA
X-FAB
0.60 µm
XB06
PT
Schematic Layout Analog Library
XB06: LNA library: RF_LNA_CELLS. LNA2 is a low noise amplifier. It should be biased by the RF bias cell
LNA2 *
LNA
X-FAB
0.35 μm
XH035
PT
Schematic Layout Analog Library
XH035: LNA Library: RF_LNA_CELLS. LNA2 is a narrowband low noise amplifier. It should be biased by the RF bias cell.
LNA1 *
LNA
X-FAB
0.60 µm
XB06
PT
Schematic Layout Analog Library
XB06: LNA library: RF_LNA_CELLS. LNA 1 is a low noise amplifier. It shoud be biased by the RF bias cell.