Analogue SSB Chip
Other
Saul Research
0.35 μm
XH035
PT
GDSII Schematic
Very low power (3V, 25uA) 90 degree analogue phase shifter for SSB encoding/decoding. A full description is on the web site, with all measurements.
IPMS_430
Microprocessor Soft IP
Fraunhofer IPMS
All Geometries
All Processes
PT
VHDL
16 Bit Microcontroller
The core IPMS_430 is compatible in its properties, like instruction set, address space and time behavior with the standard CPU MSP430 from TI. Important features are
- 16 bit Risc CPU
- 7 address modes for source operands
- 4 a
IPMS_16CXX
Microprocessor Soft IP
Fraunhofer IPMS
All Geometries
All Processes
PT
VHDL
8 Bit Microprocessor.
The core IPMS_16CXX realizes a to the PIC 16CXX-family of the firm Microchip compatible 8-bit microcontroller Important features are:
- 8-bit arithmetic (addition, subtraction, logical operations, bit manipulation)
- to 64 k i
IPMS_16550
Soft IP
Fraunhofer IPMS
All Geometries
All Processes
PT
VHDL Verilog
The UART-core IPMS_16550 realize the functionality of an serial interface.
Features:
Data rates, data formats and interrupt events are programmable
compatible to UART 16550
high flexibility in different uses
IPMS_CAN
Soft IP
Fraunhofer IPMS
All Geometries
All Processes
PT
VHDL Verilog
CAN-Controller
Features
implementation of the Basic CAN specification
no generated Overload Frames
receiving and transmitting of both identifiers (CAN specification 2.0B)
programmable data rate up to 1 Mbit/s
programmable
IPMS_IIC
Other Soft IP
Fraunhofer IPMS
All Geometries
All Processes
PT
VHDL Verilog
The core realized the I²C-bus protocol
Features:
Master and receive mode realized
Bus node address and data transmission rate are programmable
8 Bit data interface to the controller
All I²C function are implemented
Core is multimasterable
IPMS_LIN
Soft IP
Fraunhofer IPMS
All Geometries
All Processes
PT
VHDL Verilog
LIN (Local Interconnect Network) is a serial communication protocol
Features
Support of LIN specification 2.0
Programmable data rate between 1 Kbit/s and 20 Kbit/s
4 MHz clock frequency
8-byte data buffer
8-bit host controller interface
Support of
IMMSD2026A
Soft IP
IMMS GmbH
All Geometries
All Processes
PT
Verilog
The soft IP module D2026A implements a SENT transmitter according to SAE standard J2716 JAN2010 “SENT – Single Edge Nibble Transmission for Automotive Applications”. The SENT protocol constitutes a low-cost alternative to the LIN and CAN commu
abgpc01_3v3 *
Bandgaps
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC018 LP 3.3V abgpc01 is a general purpose low-power bandgap reference with N-well resistors.
abgpc02_3v3 *
Bandgaps
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC018 LP 3.3V abgpc02 is a general purpose low-power bandgap reference with rnp1 resistors
abgpc03_3V3 *
Bandgaps
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC018 LP 3.3V abgpc03 is a low-voltage bandgap reference with N-well resistors.
aopac03_3v3 *
Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC018 LP 3.3V aopac03_3v3 is a general purpose internally compensated rail-to-rail input, rail-to-rail output CMOS operational amplifier (OpAmp). The speed, gain bandwidth, and the power consumption of the amplifier are set by means of a bias curren
aopac06_3v3 *
Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC018 LP 3.3V aopac06_3v3 is a general purpose internally compensated rail-to-rail input, rail-to-rail output CMOS operational amplifier (OpAmp).
aopac07_3v3 *
Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC018 LP 3.3V aopac07_3v3 is a general purpose internally compensated rail-to-rail input, railt-to-rail ouput CMOS operational ampl;ifier (OpAmp).
aopac08_3v3 *
Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC018 LP 3.3V aopac08_3v3 is a general internally compensated NMOS input, rail-to-rail output CMOS operational amplifier (OpAmp).
aopac09_3v3 *
Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC018 LP 3.3V aopac09_3v3 is a general purpose internally compensated PMOS input, rail-to-rail output CMOS operational amplifier (OpAmp).
axtoc01_3v3 *
Crystal Oscillators
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC018 LP 3.3V axtoc01_3v3 is a robust 32.768 kHz crystal oscillator for supply voltage range from 2.4 to 3.6V.
axtoc02_3v3 *
Crystal Oscillators
X-FAB
0.18 μm
XC018
PT
Schematic Layout Analog Library
XC018 LP 3.3V axtoc02_3v3 is a robust 1-4 MHz crystal oscillator for supply voltage range from 2.4 to 3.6V.
aporc01_3v3 *
Power on Reset
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC018 LP 3.3V aporc01_3v3 is a dynamic power-on-reset circuit (POR). The cell is suitable for applicaitons where low consumption is important.
aporc02_3v3 *
Power on Reset
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC018 LP 3.3V aporc02_3v3 is a Power-on-Reset circuit with hysteresis. Reset signals are generated on both the rising and falling edge of the supply voltage.
aporc03_3v3 *
Power on Reset
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC018 LP 3.3V aporc03_3v3 is a Power-on-Rest circuit. Reset signals are generated on both the rising and falling edge of the supply voltage.
aregc01_3v3 *
Voltage Regulator
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC01801_3v3 is a 3.3V/1.8V linear voltage regulator for up to 20mA load current and internal bandgap reference. The regulator is implimented as a macro cell that fits into the core-limited I/O ring.
atmpc01_3v3 *
Other
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC018 LP 3.3V atmpc01_3v3 is an over-temperature detector. When the chip temperature rises over the high threshold temperature (~130°C) the output signal turns high.
avcoc01_3v3 *
VCO
X-FAB
0.18 μm
XC018
PT
Layout Schematic Analog Library
XC018 LP 3.3V avcoc01_3v3 is a voltage controlled oscillator (VCO).
abgpc01_5v *
Bandgaps
X-FAB
0.18 μm
XC018
PT
Analog Library Layout Schematic
XC018 LP 5V abgpc01_5v is a general purpose low-power bandgap reference with N-well resistors. The cell features wide range of supply voltage and operation temperatures, compact size and low power consumption.
abgpc02_5v *
Bandgaps
X-FAB
0.18 μm
XC018
PT
Analog Library Layout Schematic
XC018 LP 5V abgpc02_5v is a robust low-power bandgap reference with polysilicon resistors. The cell features wide range of supply voltage and operation temperatures, compact size and low power consumption.
abgpc03_5v *
Bandgaps
X-FAB
0.18 μm
XC018
PT
Analog Library Layout Schematic
XC018 LP 5V abgpc03_5v is a robust low-voltage bandgap reference with N-well resistors. The cell features wide range of supply voltages and is stable with large capacitive loads.
abgpc04_5v *
Bandgaps
X-FAB
0.18 μm
XC018
PT
Analog Library Layout Schematic
XC018 LP 5V abgpc04_5v is a robust low-voltage bandgap reference with N-well resistors. The cell features wide range of supply voltage and is stable even with large capacitive loads.
aopac03_5v *
Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Analog Library Layout Schematic
XC018 LP 5V aopac03_5v is a general purpose internally compensated CMOS OpAmp with N-MOS input and rail-to-rail output stage.
aopac03_5v *
Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Analog Library Layout Schematic
XC018 LP 5V aopac03_5v is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and rail-to-rail output stage.