aadcc01_3v3 *
ADC
X-FAB
0.18 μm
XH018
PT
Analog Library Layout Schematic
XH018 LP3MOS 3.3V aadcc01_3v3 is a 10-bit successive approximation Analog-to-Digital converter. The ADC operates with a single 3.3V analog power supply; 1.8V digital power supply and an external voltage reference.
adacc01_3v3 *
DAC
X-FAB
0.18 μm
XH018
PT
Analog Library Layout Schematic
XH018 LP3MOS 3.3V adacc01_3v3 is a 10-bit voltage-scaling (potentiometric) Digital-to-Analog converter. The adacc01 DAC operates with a single 3.3V analog power supply; a 1.8V digital power supply and an external reference voltage.
aporc02_3v3 *
Power on Reset
X-FAB
0.18 μm
XH018
PT
Analog Library Layout Schematic
XH018 LP3MOS 3.3V aporc02_3v3 is a Power-on-Reset circuit with hysteresis. Reset signal are generated on power-on and power-off transitions. Both high and low (POR and PORB) reset signals are available.
aporc03_3v3 *
Power on Reset
X-FAB
0.18 μm
XH018
PT
Analog Library Layout Schematic
XH018 LP3MOS 3.3V aporc02_3v3 is a Power-on-Reset circuit. Reset signal are generated on power-on and power-off transitions. Both high and low (POR and PORB) reset signals are available.
aregc01_3v3 *
Voltage Regulator
X-FAB
0.18 μm
XH018
PT
Analog Library Layout Schematic
XH018 LP3MOS 3.3V aregc01_3v3 is a 3.3v/1.8V linear voltage regulator for up to 20mA load current and internal bandgap reference. The regulator is implemented as macro cell that fits into the core-limited I/O ring.
atmpc01_3v3 *
Other
X-FAB
0.18 μm
XH018
PT
Analog Library Layout Schematic
XH018 LP3MOS 3.3V atmpc01_3v3 is a high-temperature alarm cirsuit. When the chip temperature rises over the high threshold temperature (133°C approx) an OVT (active high) signal is activated.
HT_ADC1
ADC
IMMS GmbH
1.00 µm
XI10
PT
GDSII Schematic
This IP is a cyclic ADC based on RSD algorithm usable as core for embedded applications. The special advantage of this type of ADC is the reduced complexity of hardware resp. layout area because of the reuse of the main stages for each bit. Up to 13 bit o
AV2102 600mA Buck
Voltage Regulator
Aivaka
0.60 µm
XC06
PT
GDSII
DC/DC regulator.
AV2110 600mA Buck
Voltage Regulator
Aivaka
0.60 µm
XC06
PT
GDSII
DC/DC Buck Regulator with 0% to 100% duty cycle.
QCBGB10_35X
Voltage Regulator Bias
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII Schematic
Bandgap Voltage Reference and Current Bias Cell.
QCBIAS1_35X
Current Reference Bias
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII Schematic
Current Reference and Current Biasing Cell.
QCCMP4_35X
Comparators
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII Schematic
Comparator Cell with N-Channel Inputs
QCDAC4_35X
DAC
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII Schematic
Resistive String architecture.
QCOP4_35X
Operational Amplifier
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII Schematic
Operational Amplifier Cell with P-Channel Inputs
QCOP5_35X
Operational Amplifier
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII Schematic
Reference Amplifier
QCPOR4_35X
Power on Reset
QualCore Logic, Inc.
0.35 μm
XH035
MP
GDSII Schematic
Power On Reset cell
QCADB5_35X
Other
QualCore Logic, Inc.
0.35 μm
XH035
PT
GDSII Schematic
Connectivity IP. This is a product chip.
MR74039
Other
Moortec Semiconductor Ltd
0.35 μm
XH035
ID
GDSII Verilog
The MR74039 is a fully integrated temperature sensor with a 12 Bit digital output designed in the XFab 0.35um XH035 process. It utilises a 12 bit Sigma Delta ADC for increased precision (0.25ºC). The temperature measurement range is fr
AR32X3A
ADC
Archband Labs Inc.
0.25 μm
FC025
PT
GDSII
AR32X3A is a 16-bit ADC for measurement purpose in 0.25µm node.
AR25X01
Other
Archband Labs Inc.
0.25 μm
FC025
PT
GDSII
AR25X01 is a 35mA LDO with the capless option in 0.25µm node
ADC12DR
ADC
A3PICs GmbH
0.60 µm
XB06
PT
GDSII
The ADC12DR is a SAR-based low-power ADC with a 12bit resolution. Its fully differential input stage features a rail-to-rail input range. At a sampling rate of 2MS/s a power consumption of only 10mW is attained applying a 5V power suppl
VREG1_8
Voltage Regulator
Suter IC-Design AG
0.18 μm
XC018
MP
GDSII Schematic
Low power voltage regulator for 1.8V logic, requires only an external capacitor, available for XC018/XH018 MOS3LP and MOS5LP, different option available on request.
XTAL5M
Crystal Oscillators
Suter IC-Design AG
0.18 μm
XC018
MP
GDSII Schematic
Low power crystal oscillator for resonator with fast start-up, available for XC018/XH018 MOS3LP, including pads, different pads on request.
Sub 1dB LNA+mixer
LNA Mixer
Saul Research
0.35 μm
XH035
PT
GDSII Schematic
LNA and optional mixer based on XH035 process. Measured noise figure below 1dB including mixer. Described in a paper on the web site. The techniques are readily applied to other processes.
Low Power DDS
Other
Saul Research
0.35 μm
XH035
PT
GDSII Schematic
Novel aproach to Direct Digital Synthesis, using a voltage-ladder reference. Accuracy is achieved by using a full resistor ladder array, so bit size equivalent to 12 bits has been shown. Prototypes using an 8 bit system are available on
Analogue SSB Chip
Other
Saul Research
0.35 μm
XH035
PT
GDSII Schematic
Very low power (3V, 25uA) 90 degree analogue phase shifter for SSB encoding/decoding. A full description is on the web site, with all measurements.
SA00AH8A00
ADC
Sony LSI Design Inc.
0.35 μm
XH035
ID
GDSII
SA00AH8A00 is a subranging 8-bit high-speed 50MS/s Analog-to-Digital Converter(ADC) for video band and disk servo use.
SA00AH8B00
ADC
Sony LSI Design Inc.
0.35 μm
XH035
ID
GDSII
SA00AH8B00 is a subranging 8-bit low-power 25MS/s Analog-to-Digital Converter(ADC) for disk servo use.
SA00PFC000
PLL
Sony LSI Design Inc.
0.35 μm
XH035
ID
GDSII
SA00PFC000 is a PLL with internal loop filter. Wide output clock freq. range : 10MHz~200MHz. Wide input clock freq. range : 2MHz~50MHz
SA00PFC010
PLL
Sony LSI Design Inc.
0.35 μm
XH035
ID
GDSII
SA00PFC010 is a PLL with internal loop filter. Wide output clock freq. range : 10MHz~160MHz. Wide input clock freq. range : 2.5MHz~6MHz.