IP Portal

Sel. IP Name Category Provider Geometry Process Name Status Deliverable Description
axtoc01 Crystal Oscillators
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. axtoc01 is a 32 kHz crystal oscillator for 3.5 to 5.5V supply voltage range. An external quartz crystal has to be connected to the XTLIN and XTALOUT pins. No other external components are required.

axtoc02 Crystal Oscillators
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. axtoc02 is a 1...4 MHz crystal oscillator for supply voltage range from 3.5 to 5.5V An external quartz crystal has to be connected to the XTLIN and XTALOUT pins. No other external components are required.

axtoc03 Crystal Oscillators
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. axtoc03 is a 2...6 MHz crystal oscillator for supply voltage range from 3.5 to 5.5V. An external quartz crystal has to be connected to the XTALIN and XTALOUT pins. No other external components are required.

axtoc04 Crystal Oscillators
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS.

aporc01 Power on Reset
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aporc01 is a dynamic Power-on-Reset circuit. During power-on, POR output is kept high as long as the supply voltage is bellow the POR threshold voltage. When the threshold voltage is reached, the POR signal turns low. A delay of few microse

aporc02 Power on Reset
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aporc02 is a Power-on-Reset circuit with hysteresis. Reset signals are generated on both the rising and falling edge of the supply voltage. During power-on, POR output is kept high as long as the supply voltage is bellow the high threshold

aporc03 Power on Reset
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. aporc03 is a Power-on-Reset circuit. Reset signals are generated on both the rising and falling edge of the supply voltage. During power-on, POR output is kept low as long as the supply voltage is bellow the threshold voltage. When the high

achpc01 Charge Pumps
X-FAB
0.60 µm
XC06
PT
Layout
Schematic
Analog Library

XC06: A_CELLS. achpc01 is a doubling charge pump 3.3V -> 5.7V. All capacitors are internal.

AV2102 600mA Buck Voltage Regulator
Aivaka
0.60 µm
XC06
PT
GDSII

DC/DC regulator.

AV2110 600mA Buck Voltage Regulator
Aivaka
0.60 µm
XC06
PT
GDSII

DC/DC Buck Regulator with 0% to 100% duty cycle.

DAC-7bit-0.6u DAC
Ridgetop Group
0.60 µm
XC06
PT
GDSII

Low Power, Wide Supply Range, CMOS, output to pos rail

DC-DC Converter DC/DC Converters
Ridgetop Group
0.60 µm
XC06
ID
GDSII

Ultra high efficiency programmable output voltage over wide input voltage range, buck/boost. Input: 1.5V - 15V. Output 2V-6V

Comparator 0.6u Comparators
Ridgetop Group
0.60 µm
XC06
PT
GDSII

Ultra Low Power, Wide Supply Range, CMOS

BGR 0.6u Bandgaps
Ridgetop Group
0.60 µm
XC06
PT
GDSII

Low Power, Wide Supply Range, CMOS

12b-50uW-12kS/s-ADC ADC
Fraunhofer IIS/EAS
0.18 μm
XC018
XH018
PT
GDSII
Schematic

XH018 LP-Cyclic-ADC for Vsupply = 2.4V..3.6V and T = -40..125°C. Available for multiple specifications: (10..12bit INL, 12..100kS/sec, >=20uW, >=0.1mm2)

abiac01_3v3 Bias
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V abiac01_3v3 is a general purpose bias cell. The circuit forces a current of 200nA (approx.) to flow through PMOS with W/L ratio of 8µm/10µm and NMOS with W/L ratio of 4µm/20µm.

abiac02_3v3 Bias
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V abiac02_3v3 is a general purpose bias cell. The circuit forces a current of 2µA (approx.) to flow through PMOS with W/L ratio of 10µm/4µm and NMOS with W/L ratio od 6µm/12µm.

abiac03_3v3 Bias
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V abiac03_3v3 is a general purpose bias cell. The circuit forces a current of 10µA (approx.) to flow through PMOS with W/L ratio of 24µm/2µm and NMOS with W/L ratio od 14µm/6µm.

acsoc01_3v3 Current Source
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V acsoc01_3v3 is a compact general purpose current source. The circuit has four outputs that drive currents of 200nA each. 

acsoc02_3v3 Current Source
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V acsoc02_3v3 is a compact general purpose current source. The circuit has four outputs that drive currents of 1µA; 2µA; 4µA; and 8µA, respectively.

aopac01_3v3 Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aopac01_3v3 is a general purpose internally compensated CMOS OpAmp with N-MOS input stage and rail-to-rail output stage. The speed, gain bandwidth, and the power consumption of the amplifier are set by means of a bias current.

aopac02_3v3 Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aopac02_3v3 is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and rail-to-rail output stage. The speed, gain bandwidth, and the power consumption of the amplifier are set by means of bias current.

acmpc01_3v3 Comparators
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V acmpc01_3v3 is a low-power current-programmable CMOS comparator with hysteresis. The input stage is P-MOS differential pair. The speed and power consumption of the comparator can be controlled by means of the bias current through the IBN inp

acmpc02_3v3 Comparators
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V acmpc02_3v3 is a low-power current-programmable CMOS comparator with hysteresis. The input stage is N-MOS differential pair.

acmpc03_3v3 Comparators
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V acmpc03_3v3 is a rail-to-rail input, current-programmable CMOS comparator. The speed and power consumption of the comparator can be controlled by means of the bias current through the IBN input.

aadcc01_3v3 ADC
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V aadcc01_3v3 is a 10-bit successive approximation Analog-to-Digital converter (ADC). The ADC operates with a single 3.3V power supply and an external voltage reference.

adacc01_3v3 DAC
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 3.3V adacc01_3v3 is a 10-bit voltage-scaling (potentionetric) Digital-to-Analog converter (DAC). The adacc01 DAC operates with a single 3.3V power supply and external reference voltage.

abiac06_5v Bias
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 5V abiac06_5v is a general purpose bias cell. The circuit forces a current of 10µA (approx.) to flow through PMOS with W/L ratio of 24µm/3µm and NMOS with W/L ratio of 10µm/4µm.

abiac07_5v Bias
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 5V abiac07_5v is a general purpose bias cell. The circuit forces a current of 2µA (approx.) to flow through PMOS with W/L ratio of 10µm/6µm and NMOS with W/L ratio of 10µm/12µm.

acsoc01_5v Current Source
X-FAB
0.18 μm
XC018
PT
Layout
Schematic
Analog Library

XC018 LP 5v acsoc01_5v is a compact general purpose current source. The circuit has four outputs that drive currents of 1µA, 2µA, 4µA, and 8µA, respectively.

 

MP = Mass ProductionPT = Prototyping, Silicon provenID = in DesignVS = Verified by Simulations (Soft-IP)

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