aopac07_3v3 * Operational Amplifier X-FAB 0.18 μm XC018 PT Layout XC018 LP 3.3V aopac07_3v3 is a general purpose internally compensated rail-to-rail input, railt-to-rail ouput CMOS operational ampl;ifier (OpAmp).
aopac08_3v3 * Operational Amplifier X-FAB 0.18 μm XC018 PT Layout XC018 LP 3.3V aopac08_3v3 is a general internally compensated NMOS input, rail-to-rail output CMOS operational amplifier (OpAmp).
aopac09_3v3 * Operational Amplifier X-FAB 0.18 μm XC018 PT Layout XC018 LP 3.3V aopac09_3v3 is a general purpose internally compensated PMOS input, rail-to-rail output CMOS operational amplifier (OpAmp).
aopac03_5v * Operational Amplifier X-FAB 0.18 μm XC018 PT Analog Library XC018 LP 5V aopac03_5v is a general purpose internally compensated CMOS OpAmp with N-MOS input and rail-to-rail output stage.
aopac03_5v * Operational Amplifier X-FAB 0.18 μm XC018 PT Analog Library XC018 LP 5V aopac03_5v is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and rail-to-rail output stage.
MIXER * Mixer X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_MIXER_CELLS. MIXER is a down conversion mixer based on a Gilbert cell topology. It should be biased by the RF bias cell.
atmpc02 * Miscellaneous X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. atmpc02 is a high-temperature detector. An OVERT output signal (active low) is generated when the chip temperature rises above 160 °C (approx.).
atmpc01 * Miscellaneous X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. atmpc01 is a high-temperature detector. An OVERT output signal (active low) is generated when the chip temperature rises above 140 °C (approx.).
IPMS_430 Microprocessor Fraunhofer IPMS All Geometries All Processes PT VHDL 16 Bit Microcontroller
The core IPMS_430 is compatible in its properties, like instruction set, address space and time behavior with the standard CPU MSP430 from TI. Important features are
- 16 bit Risc CPU
- 7 address modes for source operands
- 4 a
IPMS_16CXX Microprocessor Fraunhofer IPMS All Geometries All Processes PT VHDL 8 Bit Microprocessor.
The core IPMS_16CXX realizes a to the PIC 16CXX-family of the firm Microchip compatible 8-bit microcontroller Important features are:
- 8-bit arithmetic (addition, subtraction, logical operations, bit manipulation)
- to 64 k i
LNA1 * LNA X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_LNA_CELLS. LNA 1 is a low noise amplifier. It shoud be biased by the RF bias cell.
LNA2 * LNA X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_LNA_CELLS. LNA2 is a low noise amplifier. It should be biased by the RF bias cell
LNA3 * LNA X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_LNA_CELLS. LNA3 is a low noise amplifier with on-chip inductor. It should be biased by the RF bias cell.
LNA1 * LNA X-FAB 0.35 μm XH035 PT Schematic XH035: LNA Library: RF_LNA_CELLS. LNA1 is a broadband low noise amplifier. It should be bieased by the RF bias cell.
LNA2 * LNA X-FAB 0.35 μm XH035 PT Schematic XH035: LNA Library: RF_LNA_CELLS. LNA2 is a narrowband low noise amplifier. It should be biased by the RF bias cell.
Sub 1dB LNA+mixer LNA Saul Research 0.35 μm XH035 PT GDSII LNA and optional mixer based on XH035 process. Measured noise figure below 1dB including mixer. Described in a paper on the web site. The techniques are readily applied to other processes.
DPIN * Integrated Photodiode X-FAB 0.60 µm XB06 PT Schematic XB06: OEIC Building Block Library. DPIN_5050 and DPIN_50100 are fast photodiodes with a vertical PIN structure optimized forred light (660nm).
adrvc01 * Driver X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. adrvc01 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output. The rising slope of the output signal can be controlled by means of a bias current.
adrvc01 * Driver X-FAB 0.60 µm XC06 PT Schematic XC06: A_CELLS_HV. adrvc01 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (high-side switch). High input voltage makes the output go low (connected to ground). The rising slope of the output signal c
adrvc02 * Driver X-FAB 0.60 µm XC06 PT Schematic XC06: A_CELLS_HV. adrvc02 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (low-side switch). High input voltage makes the output go low (connected to ground).
adrvc03 * Driver X-FAB 0.60 µm XC06 PT Schematic XC06: A_CELLS_HV. adrvc03 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (high-side switch). High input voltage makes the output go low (connected to ground). The rising slope of the output signal c
adrvc02 * Driver X-FAB 0.35 μm XH035 PT Schematic XH035: A_CELLS_HV. For MOS module only. adrvc02 is a driver circuit for external loads (relays, LEDs, etc). The circuit features PNOS open-drain output (high-side switch). The layout of adrvc02 makes it easy to incorporate in the flat IO ring.
adrvc03 * Driver X-FAB 0.35 μm XH035 PT Schematic XH035: A_CELLS_HV. For MOS module only. adrvc03 is a driver circuit for external loads (realys, LEDs, etc). The circuit features NMOS open-drain output (low-side switch). The layout of adrvc03 makes it easy to incorporate in the flat IO ring.
DIV32 * Divider X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_DIVIDER_CELLS. DIV32 is a Prescaler with a fixed divider ratio of 32. It should be biased by the RF bias cell.
DIV32 * Divider X-FAB 0.35 μm XH035 PT Layout XH035: DIVIDER Library: RF_DIVIDER_CELLS. DIV32 is a Prescaler with a fixed ratio of 32. It should be biased by the RF bias cell.
adacc01 * DAC X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. adacc01 is a 8-bit digital-to-analog converter (DAC) with a R-2R ladder network. The DAC operates with a single 5V supply and external reference voltage.
adacc02 * DAC X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. adacc02 is a 10-bit digital-to-analog converter (DAC) with a R-2R ladder network. The DAC operates with a single 5V supply and external reference voltage.
adacc03 * DAC X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. adacc03 is a 8-bit voltage-scaling digital-to-analog converter (DAC). The device can operate at supply and reference voltages down to 3.2V.
dac8 * DAC X-FAB 0.80 µm CX08 PT Schematic CX08A: Analog library. DAC8 is a 8-bit digital-to-analog converter. The architecture is based on two resistor dividers. Because of its high output impedance, which is also code dependent, a low offset buffer operational amplifier is strictly recommen
dac10 * DAC X-FAB 0.80 µm CX08 PT Schematic CX08A: Analog library. DAC10 is a 10-bit digital-to-analog converter. The architecture is based on two resistor dividers. Because of its high output impedance, which is also code dependent, a low offset buffer operational amplifier is strictly recomm
