aopac09_3v3 * Operational Amplifier X-FAB 0.18 μm XC018 PT Layout XC018 LP 3.3V aopac09_3v3 is a general purpose internally compensated PMOS input, rail-to-rail output CMOS operational amplifier (OpAmp).
axtoc01_3v3 * Crystal Oscillators X-FAB 0.18 μm XC018 PT Layout XC018 LP 3.3V axtoc01_3v3 is a robust 32.768 kHz crystal oscillator for supply voltage range from 2.4 to 3.6V.
aporc01_3v3 * Power on Reset X-FAB 0.18 μm XC018 PT Layout XC018 LP 3.3V aporc01_3v3 is a dynamic power-on-reset circuit (POR). The cell is suitable for applicaitons where low consumption is important.
aporc02_3v3 * Power on Reset X-FAB 0.18 μm XC018 PT Layout XC018 LP 3.3V aporc02_3v3 is a Power-on-Reset circuit with hysteresis. Reset signals are generated on both the rising and falling edge of the supply voltage.
aporc03_3v3 * Power on Reset X-FAB 0.18 μm XC018 PT Layout XC018 LP 3.3V aporc03_3v3 is a Power-on-Rest circuit. Reset signals are generated on both the rising and falling edge of the supply voltage.
aregc01_3v3 * Voltage Regulator X-FAB 0.18 μm XC018 PT Layout XC01801_3v3 is a 3.3V/1.8V linear voltage regulator for up to 20mA load current and internal bandgap reference. The regulator is implimented as a macro cell that fits into the core-limited I/O ring.
atmpc01_3v3 * Other X-FAB 0.18 μm XC018 PT Layout XC018 LP 3.3V atmpc01_3v3 is an over-temperature detector. When the chip temperature rises over the high threshold temperature (~130°C) the output signal turns high.
avcoc01_3v3 * VCO X-FAB 0.18 μm XC018 PT Layout XC018 LP 3.3V avcoc01_3v3 is a voltage controlled oscillator (VCO).
abgpc01_1v8 * Bandgaps X-FAB 0.18 μm XH018 PT Layout XH018 LP3MOS 1.8V abgpc01_1v8 is a general purpose 1.2V bandgap reference with N-well resistirs and PNP (qpvc) diode matrix
abgpc05_1v8 * Bandgaps X-FAB 0.18 μm XH018 PT Layout XH018 LP3MOS 1.8V abgpc05_1v8 is a general purpose 1.2V bandgap reference with N-well resistors and NPN (qnva) diode matrix.
DPIN * Integrated Photodiode X-FAB 0.60 µm XB06 PT Schematic XB06: OEIC Building Block Library. DPIN_5050 and DPIN_50100 are fast photodiodes with a vertical PIN structure optimized forred light (660nm).
aopac01 * Operational Amplifier X-FAB 0.60 µm XB06 PT Schematic XB06: A_CELLS. aopac01 is a low power internal frequency-compensated CMOS operational amplifier with pmos input stage
LNA2 * LNA X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_LNA_CELLS. LNA2 is a low noise amplifier. It should be biased by the RF bias cell
dac8 * DAC X-FAB 0.80 µm CX08 PT Schematic CX08A: Analog library. DAC8 is a 8-bit digital-to-analog converter. The architecture is based on two resistor dividers. Because of its high output impedance, which is also code dependent, a low offset buffer operational amplifier is strictly recommen
dac10 * DAC X-FAB 0.80 µm CX08 PT Schematic CX08A: Analog library. DAC10 is a 10-bit digital-to-analog converter. The architecture is based on two resistor dividers. Because of its high output impedance, which is also code dependent, a low offset buffer operational amplifier is strictly recomm
LNA1 * LNA X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_LNA_CELLS. LNA 1 is a low noise amplifier. It shoud be biased by the RF bias cell.
LNA3 * LNA X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_LNA_CELLS. LNA3 is a low noise amplifier with on-chip inductor. It should be biased by the RF bias cell.
LCVCO2 * VCO X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_LCVCO_CELLS. LCVCO2 is a fully integrated LC-VCO. It should be biased by the RF bias cell. It is based on a cross-coupled bipolar transistor pair. It contains AC-coupled varactors and a special circuit technique for maintaining the D
LCVCO3 * VCO X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_LCVCO_CELLS. LCVCO3 is a fully integrated LC-VCO. It should be biased by the RF bias cell. It contains a cross-coupled bipolar transistor pair and direct coupled varactors. For this reason, it has a higher tuning range than the other
RINGVCO1 * VCO X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_VCO_CELLS. RINGVCO1 is a fully integrated VCO. It should be biased by the RF bias cell. It consists of a ringoscillator that is tuned by switching the delay chain between 2 and 4 delay stages. The transition between the two borders i
MIXER * Mixer X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_MIXER_CELLS. MIXER is a down conversion mixer based on a Gilbert cell topology. It should be biased by the RF bias cell.
PA * Power Amplifiers X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_PA_CELLS. PA is a non-linear Power Amplifier that is intended for the transmission of ASK and FSK signals. Its output power level can be digitally controlled in 4 steps. It should be biased by the RF bias cell.
DIV32 * Divider X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_DIVIDER_CELLS. DIV32 is a Prescaler with a fixed divider ratio of 32. It should be biased by the RF bias cell.
OEIC_Fast * Optical Receiver Channel X-FAB 0.60 µm XB06 PT Schematic XB06: OEIC Building Block Library. OEIC_Fast is a fast DVD receiver channel with two selectable gain settings. Can be integrated with photodiode to form a complete optical receiver channel optimized for 660nm wavelengths.
OEIC_Sensitive * Optical Receiver Channel X-FAB 0.60 µm XB06 PT Schematic XB06: OEIC Building Block Library. OEIC_Sensitive is a sensitive DVD receiver channel with two selectable gain settings. Can be integrated with photodiode to form a complete optical receiver channel optimized for 660nm wavelengths.
aopac14 * Operational Amplifier X-FAB 0.60 µm XC06 PT Schematic XC06: A_CELLS_HV. aopac14 is a high-voltage (VDD up to 10V), low-power, internally-compensated CMOS OpAmp with NMOS input stage.
aopac15 * Operational Amplifier X-FAB 0.60 µm XC06 PT Schematic XC06: A_CELLS_HV. aopac15 is a high-voltage, internally-compensated CMOS OpAmp with NMOS input stage and bipolar emitter-follower output. The incorporated level shifters allow the EN and ENB inputs to be controlled by 5V circuitry.
abiac07 * Bias X-FAB 0.60 µm XC06 PT Schematic XC06: A_CELLS_HV. abiac07 is a high-voltage bias cell. The circuit forces a current of 2µA (approx.) to flow through pghv PMOS with W/L ratio of 10µm/10µm and nmv NMOS with W/L ratio of 10µm/12µm.
abiac08 * Bias X-FAB 0.60 µm XC06 PT Schematic XC06: A_CELLS_HV. abiac08 is a high-voltage bias cell. THe circuit forces a current of 2µA (approx.) to flow through pgmv PMOS with W/L ratio of 10µm/10µm and nhv NMOS with W/L ratio od 10µm/12µm. The cell features low-cost process option and is a co
adrvc01 * Driver X-FAB 0.60 µm XC06 PT Schematic XC06: A_CELLS_HV. adrvc01 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output (high-side switch). High input voltage makes the output go low (connected to ground). The rising slope of the output signal c
