axtoc02 * Crystal Oscillators X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. axtoc02 is a 1…2MHz crystal oscillator for voltage range from 3.5V to 5.5V.
axtoc03 * Crystal Oscillators X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. axtoc03 is a 2…5MHz crystal oscillator for voltage range from 3.5V to 5.5V.
aporc01 * Power on Reset X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. aporc01 is a digital power-on-reset circuit. During power-on, POR output is kept high as long as the supply voltage is below the POR threshold voltage. After the threshold has been reached, the POR signals turns low. A delay of
aporc02 * Power on Reset X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. aporc02 is a digital power-on-reset circuit. PORB output is kept low as long as the supply voltage is below the POR threshold voltage. PORB signal is generated on both rising and falling edges of the supply voltage. During power
aporc04 * Power on Reset X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. aporc04 is a digital power-on-reset circuit. PORB output is kept low as long as the supply voltage is below the high POR threshold voltage. PORB signal is generated on both rising and falling edges of the supply voltage. During
apogc01 * Power on Reset X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. apogc01 is a general purpose, power good detector. A power good signal (active high) is generated as long as the supply voltage at the VDDA pin lies within the 4.5V - 5.5V limits. When the supply voltage is beyond the either low
adacc01 * DAC X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. adacc01 is a 8-bit digital-to-analog converter (DAC) with a R-2R ladder network. The DAC operates with a single 5V supply and external reference voltage.
adacc02 * DAC X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. adacc02 is a 10-bit digital-to-analog converter (DAC) with a R-2R ladder network. The DAC operates with a single 5V supply and external reference voltage.
adacc03 * DAC X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. adacc03 is a 8-bit voltage-scaling digital-to-analog converter (DAC). The device can operate at supply and reference voltages down to 3.2V.
aregc01 * Voltage Regulator X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. aregc01 is a 5V / 3.3V positive voltage linear regulator for up to 10 mA load current.
aregc02 * Voltage Regulator X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. aregc02 is a 2.4V / 3.3V positive voltage switching regulator for on-chip loads and up to 10 mA load current.
adrvc01 * Driver X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. adrvc01 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output. The rising slope of the output signal can be controlled by means of a bias current.
atmpc01 * Miscellaneous X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. atmpc01 is a high-temperature detector. An OVERT output signal (active low) is generated when the chip temperature rises above 140 °C (approx.).
atmpc02 * Miscellaneous X-FAB 1.00 µm XC10 PT Analog Library XC10: A_CELLS; A_CELLS_M1. atmpc02 is a high-temperature detector. An OVERT output signal (active low) is generated when the chip temperature rises above 160 °C (approx.).
adc10 * ADC X-FAB 0.80 µm CX08 PT Analog Library CX08A: Analog library. ADC10 is a 10-bit analog-to-digital converter which utilizes successive approximation technique.
adc8 * ADC X-FAB 0.80 µm CX08 PT Schematic CX08A: Analog library. ADC8 is a 8-bit analog-to-digital converter which utilizes successive-approximation
dac8 * DAC X-FAB 0.80 µm CX08 PT Schematic CX08A: Analog library. DAC8 is a 8-bit digital-to-analog converter. The architecture is based on two resistor dividers. Because of its high output impedance, which is also code dependent, a low offset buffer operational amplifier is strictly recommen
dac10 * DAC X-FAB 0.80 µm CX08 PT Schematic CX08A: Analog library. DAC10 is a 10-bit digital-to-analog converter. The architecture is based on two resistor dividers. Because of its high output impedance, which is also code dependent, a low offset buffer operational amplifier is strictly recomm
LNA1 * LNA X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_LNA_CELLS. LNA 1 is a low noise amplifier. It shoud be biased by the RF bias cell.
LNA2 * LNA X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_LNA_CELLS. LNA2 is a low noise amplifier. It should be biased by the RF bias cell
LNA3 * LNA X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_LNA_CELLS. LNA3 is a low noise amplifier with on-chip inductor. It should be biased by the RF bias cell.
LCVCO2 * VCO X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_LCVCO_CELLS. LCVCO2 is a fully integrated LC-VCO. It should be biased by the RF bias cell. It is based on a cross-coupled bipolar transistor pair. It contains AC-coupled varactors and a special circuit technique for maintaining the D
LCVCO3 * VCO X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_LCVCO_CELLS. LCVCO3 is a fully integrated LC-VCO. It should be biased by the RF bias cell. It contains a cross-coupled bipolar transistor pair and direct coupled varactors. For this reason, it has a higher tuning range than the other
RINGVCO1 * VCO X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_VCO_CELLS. RINGVCO1 is a fully integrated VCO. It should be biased by the RF bias cell. It consists of a ringoscillator that is tuned by switching the delay chain between 2 and 4 delay stages. The transition between the two borders i
MIXER * Mixer X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_MIXER_CELLS. MIXER is a down conversion mixer based on a Gilbert cell topology. It should be biased by the RF bias cell.
PA * Power Amplifiers X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_PA_CELLS. PA is a non-linear Power Amplifier that is intended for the transmission of ASK and FSK signals. Its output power level can be digitally controlled in 4 steps. It should be biased by the RF bias cell.
DIV32 * Divider X-FAB 0.60 µm XB06 PT Schematic XB06: LNA library: RF_DIVIDER_CELLS. DIV32 is a Prescaler with a fixed divider ratio of 32. It should be biased by the RF bias cell.
BIAS * Bias X-FAB 0.60 µm XB06 PT Verilog XB06: LNA library: RF_BIAS_CELLS. BIAS is a bias cell intended for use with various RF building blocks. It is designed as a bandgap reference as well as voltage-to-current converter. Current biasing is preferable because of the higher immunity to interfer
HT_ADC1 ADC IMMS GmbH 1.00 µm XI10 PT GDSII This IP is a cyclic ADC based on RSD algorithm usable as core for embedded applications. The special advantage of this type of ADC is the reduced complexity of hardware resp. layout area because of the reuse of the main stages for each bit. Up to 13 bit o
OEIC_Fast * Optical Receiver Channel X-FAB 0.60 µm XB06 PT Schematic XB06: OEIC Building Block Library. OEIC_Fast is a fast DVD receiver channel with two selectable gain settings. Can be integrated with photodiode to form a complete optical receiver channel optimized for 660nm wavelengths.
