IP Portal

Sel. IP Name Category Provider Geometry Process Name Status Deliverable Description
adacc03 DAC
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. adacc03 is a 8-bit voltage-scaling digital-to-analog converter (DAC). The device can operate at supply and reference voltages down to 3.2V.

aregc01 Voltage Regulator
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. aregc01 is a 5V / 3.3V positive voltage linear regulator for up to 10 mA load current.

aregc02 Voltage Regulator
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. aregc02 is a 2.4V / 3.3V positive voltage switching regulator for on-chip loads and up to 10 mA load current.

adrvc01 Driver
X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. adrvc01 is a driver circuit for external loads (relays, LEDs, etc). The circuit features NMOS open-drain output. The rising slope of the output signal can be controlled by means of a bias current.

atmpc01 X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. atmpc01 is a high-temperature detector. An OVERT output signal (active low) is generated when the chip temperature rises above 140 °C (approx.).

atmpc02 X-FAB
1.00 µm
XC10
PT
Analog Library
Layout
Schematic

XC10: A_CELLS; A_CELLS_M1. atmpc02 is a high-temperature detector. An OVERT output signal (active low) is generated when the chip temperature rises above 160 °C (approx.).

adc10 ADC
X-FAB
0.80 µm
CX08
PT
Analog Library
Layout
Schematic

CX08A: Analog library. ADC10 is a 10-bit analog-to-digital converter which utilizes successive approximation technique.

abgpc01_5v Bandgaps
X-FAB
0.18 μm
XC018
PT
Analog Library
Layout
Schematic

XC018 LP 5V abgpc01_5v is a general purpose low-power bandgap reference with N-well resistors. The cell features wide range of supply voltage and operation temperatures, compact size and low power consumption.

abgpc02_5v Bandgaps
X-FAB
0.18 μm
XC018
PT
Analog Library
Layout
Schematic

XC018 LP 5V abgpc02_5v is a robust low-power bandgap reference with polysilicon resistors. The cell features wide range of supply voltage and operation temperatures, compact size and low power consumption.

abgpc03_5v Bandgaps
X-FAB
0.18 μm
XC018
PT
Analog Library
Layout
Schematic

XC018 LP 5V abgpc03_5v is a robust low-voltage bandgap reference with N-well resistors. The cell features wide range of supply voltages and is stable with large capacitive loads.

abgpc04_5v Bandgaps
X-FAB
0.18 μm
XC018
PT
Analog Library
Layout
Schematic

XC018 LP 5V abgpc04_5v is a robust low-voltage bandgap reference with N-well resistors. The cell features wide range of supply voltage and is stable even with large capacitive loads.

aopac03_5v Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Analog Library
Layout
Schematic

XC018 LP 5V aopac03_5v is a general purpose internally compensated CMOS OpAmp with N-MOS input and rail-to-rail output stage.

aopac03_5v Operational Amplifier
X-FAB
0.18 μm
XC018
PT
Analog Library
Layout
Schematic

XC018 LP 5V aopac03_5v is a general purpose internally compensated CMOS OpAmp with P-MOS input stage and rail-to-rail output stage.

acmpc03_5v Comparators
X-FAB
0.18 μm
XC018
PT
Analog Library
Layout
Schematic

XC018 LP 5V acmpc03_5v is a rail-to-rail input, current-programmable CMOS comparator.

axtoc01_5v Crystal Oscillators
X-FAB
0.18 μm
XC018
PT
Analog Library
Layout
Schematic

XC018 LP 5V axtoc01_5v is a robust 32.7689 kHz crystal oscillator for supply voltage range from 3.5V to 5.5V.

axtoc02_5v Crystal Oscillators
X-FAB
0.18 μm
XC018
PT
Analog Library
Layout
Schematic

XC018 LP 5V axtoc02-5v is a robust 1-4 MHz crystal oscillator for supply voltage range from 3.5V to 5.5V.

aadcc01_5v ADC
X-FAB
0.18 μm
XC018
PT
Analog Library
Layout
Schematic

XC018 LP 5V aadcc01_5v is a 10-bit successive approximation Analog-to-Digital converter (ADC). The ADC operated with a single 5.0V analog power supply, 1.8V digital power supply and an external voltage reference.

adacc01_5v ADC
X-FAB
0.18 μm
XC018
PT
Analog Library
Layout
Schematic

XC018 LP 5V is a 10-bit voltage -scaling (potentiometric) digital-to-analog converter (DAC). The DAC operates with a single 5.0V analog power supply, a 1.8V digital power supply and external reference voltage.

aporc03_5v Power on Reset
X-FAB
0.18 μm
XC018
PT
Analog Library
Layout
Schematic

XC018 LP 5V aporc03_5v is a power-on-Reset circuit. Reset signals are generated on both the rising and falling edge of the supply voltage.

atmpc01_5v Other
X-FAB
0.18 μm
XC018
PT
Analog Library
Layout
Schematic

XC018 LP 5V atmpc01_5v is an over-temperature detector. When the chip temperature rises over the high threshold temperature (~125°C) the output signal turns high.

abiac06_1v8 Bias
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V abiac06_1v8 is a general purpose low voltage (down to 1.2V) bias cell. The circuit forces a current of 2µA (approx.) to flow through N-MOS with W/L ratio of 20µm/8µm.

abiac08_1v8 Bias
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8Vabiac08_1v8 is a general purpose low voltage (down to 1.2V) bias cell. The circuit forces a current of 10µA (approx.) to flow through N-MOS with W/L ratio of 40µm/60µm.

aopac03_1v8 Operational Amplifier
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V aopac03_1v8 is a general purpose internally compensated CMOS OpAmp with NMOS native input stage and rail-to-rail output stage. This cell provides typical value of gain bandwidth 1.1MHz and operates with VDD down to 1.2V.

aopac04_1v8 Operational Amplifier
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V aopac04_1v8 is a general purpose internally compensated CMOS OpAmp with NMOS native input stage and rail-to-rail output stage. This cell provides typical value of gain bandwidth 3.7MHz and operates with VDD down to 1.2V.

aopac09_1v8 Operational Amplifier
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V aopac09_1v8 is a general purpose internally compensated CMOS OpAmp with NMOS native input stage and rail-to-rail output stage. This cell provides typical value of gain bandwidth 162kHz.

aopac10_1v8 Operational Amplifier
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V aopac10_1v8 is a general purpose internally compensated CMOS OpAmp with NMOS native input stage and rail-to-rail output stage. This cell provides typical value of gain bandwidth 382kHz.

aopac11_1v8 Operational Amplifier
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V aopac11_1v8 is a general purpose internally compensated CMOS OpAmp with NMOS native input stage and rail-to-rail output stage. This cell provides typical value of gain bandwidth 1.5MHz.

aopac12_1v8 Operational Amplifier
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V aopac12_1v8 is a general purpose internally compensated CMOS OpAmp with NMOS native input stage and rail-to-rail output stage. This cell provides typical value of gain bandwidth 3.8MHz.

aporc02_1v8 Power on Reset
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V aporc02_1v8 is a Power-on-Reset circuit with hysteresis. Both high and low reset signals are available. Reset signals are generated on power-on and power-off transitions. 40mV (typ) hysteresis for safer operation.

aporc03_1v8 Power on Reset
X-FAB
0.18 μm
XH018
PT
Analog Library
Layout
Schematic

XH018 LP3MOS 1.8V aporc03_1v8 is a Power-on-Reset circuit with hysteresis. Both high and low reset signals are available. Reset signals are generated on power-on and power-off transitions. 35mV (typ) hysteresis for safer operation.

 

MP = Mass ProductionPT = Prototyping, Silicon provenID = in DesignVS = Verified by Simulations (Soft-IP)

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