94 entries, filtered by: Paper
Published: June 2013

Lifetime determination is one of the reliability key tasks to have an accurate estimation of the period of time that can still survive with a certain confidence level under the specific operating conditions to perform the respective function of the applications. Various reliability tests have been designed to reveal and assess the respective wear-out degradation mechanisms.


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Published: May 2013

The filters are constituted by a Fabry-Perot resonator formed by two Bragg mirrors separated by a patterned cavity. The filter response can be tuned by changing the geometric parameters of the patterning, and consequently the cavity effective refractive index. In this way, many different filters can be produced at once on a single chip, allowing multichanneling. The filter has been designed, produced, and characterized. The results for a chip with 24 filters are presented.


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Published: May 2013

This paper demonstrates a novel lateral superjunction (SJ) lateral insulated gate bipolar transistor (LIGBT) fabricated in 0.18μm partial silicon on insulator (PSOI) HV process. The results presented are based on extensive experimental measurements and numerical simulations.


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Published: May 2013

This paper presents versatile HV lateral JFET design method on 0.18μm SOI BCD technology to achieve variable Vth(pinch-off voltage) and Idsat, without DIBL effect over full operating Vds range and scalable breakdown voltage capability on both N-ch and P-ch JFET. The significant advantage of a HV JFET compared to depletion MOSFET is the lower area consumption in real circuit design which due to higher Idsat values at Vgs=0V.


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Published: April 2013

In this paper a modified MEMS foundry process allowing the production of 3D inertial sensors, such as accelerometers, gyroscopes and combinations, is introduced. The new MEMS process is suitable for a wide range of applications that use 3D accelerometers or gyroscopes. One-axis and three-axis designs can be produced with the same process, and the fabrication of complex inertial measurement units, in particular, the assembly process, is simplified.


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Published: December 2012

We present a method for producing monolithically integrated CMOS optical filters with different and customerspecific responses. The filters are constituted by a Fabry-Perot resonator formed by two Bragg mirrors separated by a patterned cavity. The filter response can be tuned by changing the geometric parameters of the patterning, and consequently the cavity effective refractive index. In this way, many different filters can be produced at once on a single chip, allowing multichanneling. The filter has been designed, produced, and characterized. The results for a chip with 24 filters are presented.


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Published: December 2012

This paper evaluates the technique used to improve the latching characteristics of the 200V n-type superjunction (SJ) LIGBT on partial SOI. The initial design latches at about 23V with forward voltage drop (VON) of 2V at 300A/cm2. The latest design shows increase of latch-up voltage close to 100V without significant expense of VON.


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Published: December 2012

The fabrication of semiconductor devices, even in the area of customer oriented business, is one of the most complex production tasks in the world. A typical wafer production process consists of several hundred steps with numerous resources like equipments and operating staff. The optimal assignment of each resource at each time for a certain number of wafers is vital for a efficient production process. Several demands defined by the customers and facility management must be taken into consideration with the objective to find the best tradeoff between the different needs.


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Published: October 2012

This Inter-poly Oxide-Nitride-Oxide (ONO) dielectric film has been widely used as dielectric films in stacked gate Flash memory devices. The ONO dielectric film plays an important role in ensuring good reliability in flash memory devices. In this paper, the characteristics of ONO dielectric films have been analyzed.


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Published: October 2012

In this paper, optimization and physical scaling of the SONOS ONO triple layer are extensively evaluated, with detailed characterization of the Flash cell behavior. Reliability tests have demonstrated high temperature endurance and long-term data retention. The results have shown that the reliability requirement is attainable even with down scaling of the vertical component of the oxynitride charge trapping layer, which makes it feasible to operate the cell at a lower programming voltage.


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