16 entries, filtered by: Non-Volatile Memory
Published: March 2009

The analog foundry business is not just a fad. Many logic foundries are seriously trying to move into this space. However, their transformation requires a change from being contract manufacturers that provide capacity and compete on the cost side to becoming a true provider of feature-rich process technologies with modular front and back ends and comprehensive process characterization. Also, they must offer a complete analog design ecosystem including libraries, analog IP and lots of design support – complicated by the absence of standards. Such capabilities would enable customers to reuse their analog IP across different applications and various technology platforms. This article explores barriers to such a transformation near-term.


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Published: July 2008

Experimental condition of thin SAB Oxide around 350Å coupling with 400Å Contact SiON film has exhibited the worst data retention behavior in One Time Programmable (OTP) & Multiple Time Programmable (MTP) memory device.


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Published: July 2008

In 0.11um and larger technology node non-volatile memory process integration, undesired cobalt salicide residue formation is found to degrade ohmic contact resistant and cause severe yield loss. TiN/Ti/Co stack is applied in the process to get good CoSi2 formation. The abnormal salicide residue formation is detected after cobalt stripping process which is applying a two step selective wet etching.


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Published: June 2008

The FC025 series is X-FAB’s 0.25-micron Modular Logic and Mixed Signal Technology. Main target applications are standard cell, semi-custom and full custom designs for consumer and communication products. Based upon an industry standard single poly with up to five metal layers 0.25-micron drawn gate length N-well process, modules are available for five layers of metal, double poly/metal capacitors, high resistive poly and dual gate oxide (5V) transistors.


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Published: May 2007

A new smart power SOC IC process including up to 50V HV-MOS transistors, SONOS principle based non-volatile memory components and analog devices using an advanced 0.18μm platform is presented. Process architecture and device portfolio are focused on automotive applications e.g. sensor signal conditioning and integrated output drivers. HV-MOS and SONOS integration as well as device properties are discussed with regard to reliability aspects. Additionally key features of NPN bipolar transistors and depletion NMOST are given.


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Published: March 2006

The feasibility of EEPROM memories in SOI process technologies has been proven. It has also been shown that known data retention problems at high temperatures caused by leakage currents can be solved without extra circuitry. In this paper results of EEPROM cell matrix measurements regarding functionality and reliability will be presented. Different cell designs will be compared. Furthermore, a 32x16 bit EEPROM prototype and memory test results will be shown.


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