Why Logic Foundries Will Fail in Moving to Analog

The analog foundry business is not a fad. Many foundries are seriously trying to move into this space. However, transformation requires a change from being contract manufacturers that provide capacity and compete on the cost side, to becoming true providers of feature-rich process technologies with modular front- and back-ends and comprehensive process characterization. Also, analog foundries must offer a complete analog design ecosystem including libraries, analog intellectual property (IP) and lots of design support – complicated by the absence of standards. Such capabilities would enable customers to reuse their analog IP across different applications and various technology platforms. Moving into the analog space is no easy task, and such a transformation, especially near term, is barrier-ridden.

 

Analog Design Ecosystem: Analog foundries must offer a complete analog design ecosystem including a large variety of active and passive primitive devices, digital standard cell and input/output (I/O) libraries, analog IP, models and comprehensive design support.

Why is there so much activity in the analog foundry space right now? It’s commonly perceived that the digital business is driven by Moore’s Law, which states that the number of gates doubles every 18 to 24 months. The implication is that whoever follows Moore’s Law must move to smaller process nodes. Currently, 22-nanometer nodes are in development. However, the associated costs are rising significantly, making it more and more difficult to justify such investments when only a handful of applications (e.g., microprocessors, baseband chips for cell phones, DRAMs and Flash memory) create a positive return on investment (ROI). Often, it’s no longer feasible to move to smaller process node development. The number of players that can afford to do business in the digital foundry space is shrinking rapidly. Such players as TSMC, UMC and Chartered have the financial strength to follow Moore’s Law, but it’s not known if they or other foundries will be able to follow it in the future.

The accelerating cost associated with following Moore’s Law and building 300mm mega-fabs capable of running up to 100,000 wafers per month leaves a number of smaller digital foundry players at a competitive disadvantage. They are stuck with 8-inch fabs and process capabilities from 0.35- to 0.13-micron. The digital applications they previously served are moving to 90-nanometer and smaller geometries manufactured in highly efficient 300mm fabs, well beyond the range these smaller fabs can handle. Therefore, these foundries face the challenge of trying to sustain profitability.

The way out of this dilemma is to address applications within their technology reach, such as CMOS image sensors, smart discretes, CMOS microelectromechanical systems (MEMS) or analog applications.

Analog is the largest market at approximately US$40 billion in 2008. It’s no surprise that many smaller foundries are trying to find new business in the analog fab space.

Although analog IC vendors follow Moore’s Law, they follow it at a much slower pace, and do not jump to different process nodes every 18 to 24 months. In fact, major analog nodes of 1.0- , 0.80-, 0.60- and now 0.35-micron are in stark contrast to the digital nodes currently at 45-nanometer, already nearly an order of magnitude smaller.

Analog IC vendors currently are moving to 0.18-micron, with 0.13-micron analog technology in development. However, many analog integrated device manufacturers (IDMs) have internal capabilities down to 0.35-micron only. To move to quarter micron and below to remain competitive, they face a major decision: build their own 0.18-micron capabilities (i.e., build a new fab) or choose a foundry partner with these capabilities.

So the semiconductor industry finds itself at an unusual nexus. Second-tier digital foundries are stuck with idle capacity for process nodes at 0.35-, 0.18- and 0.13-micron, and are looking for ways to fill it. Meanwhile, the analog world now is moving into those process nodes, leaving many analog IDMs that lack this capability facing “build or buy” decisions. The situation is heightened by the pressure of the industry-wide move toward fabless or fab-lite strategies, and the extremely difficult task of choosing the right analog foundry partner.

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