16 entries, filtered by: Non-Volatile Memory
Published: June 2008

The FC025 series is X-FAB’s 0.25-micron Modular Logic and Mixed Signal Technology. Main target applications are standard cell, semi-custom and full custom designs for consumer and communication products. Based upon an industry standard single poly with up to five metal layers 0.25-micron drawn gate length N-well process, modules are available for five layers of metal, double poly/metal capacitors, high resistive poly and dual gate oxide (5V) transistors.


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Published: December 2012

The XH018 series is X-FAB’s 0.18 micron Modular Mixed Signal HV CMOS Technology. Based upon the industrial standard single poly with up to six metal layers 0.18 micron drawn gate length N-well process, integrated with highvoltage and Non-Volatile-Memory modules, the platform is ideal for SOC applications in the automotive market, as well as emdedded high-voltage applications in the communications, consumer and industrial market.
Comprehensive design rules, precise SPICE models, analog and digital libraries, IPs and development kits support the process for major EDA vendors.


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Published: January 2013

The XT018 series is X-FAB’s 0.18 micron Modular High-voltage SOI CMOS Technology. Based on SOI wafers and the industrial standard single poly with up to six metal layers 0.18-micron drawn gate length process, integrated with high voltage and Non-Volatile-Memory modules, the platform is specifically designed for a new generation of cost-effective "Super Smart Power" technology; operating in temperature range of -40 to 175 °C.


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Published: March 2006

The feasibility of EEPROM memories in SOI process technologies has been proven. It has also been shown that known data retention problems at high temperatures caused by leakage currents can be solved without extra circuitry. In this paper results of EEPROM cell matrix measurements regarding functionality and reliability will be presented. Different cell designs will be compared. Furthermore, a 32x16 bit EEPROM prototype and memory test results will be shown.


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Published: May 2007

A new smart power SOC IC process including up to 50V HV-MOS transistors, SONOS principle based non-volatile memory components and analog devices using an advanced 0.18μm platform is presented. Process architecture and device portfolio are focused on automotive applications e.g. sensor signal conditioning and integrated output drivers. HV-MOS and SONOS integration as well as device properties are discussed with regard to reliability aspects. Additionally key features of NPN bipolar transistors and depletion NMOST are given.


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Published: July 2008

In 0.11um and larger technology node non-volatile memory process integration, undesired cobalt salicide residue formation is found to degrade ohmic contact resistant and cause severe yield loss. TiN/Ti/Co stack is applied in the process to get good CoSi2 formation. The abnormal salicide residue formation is detected after cobalt stripping process which is applying a two step selective wet etching.


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Published: July 2008

Experimental condition of thin SAB Oxide around 350Å coupling with 400Å Contact SiON film has exhibited the worst data retention behavior in One Time Programmable (OTP) & Multiple Time Programmable (MTP) memory device.


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Published: August 2009

One time programmable (OTP) electrically programmed read only memory (EPROM) become a simple low cost solution in non-volatile memory (NVM) to be integrated in variety of CMOS baseline technology node platforms without extra masks or additional process cost incur. The feasibility of EPROM floating gate built on buried channel pMOSFET was explored experimentally. The buried channel device physic fundamental characteristics would lead to consistently high erased cell current (Ioff) in μA level instead of expected pA level for EPROM cell in erased state. Alternative external voltage biasing could not be applied due to unavailability of floating gate terminal connection to control the buried channel onoff state.


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Published: July 2011

An enhancement-mode Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) device has been developed in 0.13μm technology platform. The single-transistor (1-T) SONOS device in NOR Flash memory array utilizes n-channel cells. The development of 1-T SONOS is not an easy feat due to many disturbs experienced by the cells during operation.


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Published: March 2012

X-FAB, a pure play foundry, has already extensive experience in volume production of monolithic integrated MEMS devices. The idea of combining CMOS and MEMS processes to obtain monolithic integrated sensor solutions is a logical, consequent step following the “More than Moore” strategy.


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