190 entries
Published: September 2013

This webinar session focuses on the importance of proper characterization data for successful analog design, and discusses how modeling and process characterization can make life easier for analog design engineers. It covers statistic modeling approaches, model quality assurance and process calibration.


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Published: September 2013

Showing first-time-right performance statistics from X-FAB's customer base, this first session outlines the challenges involved in achieving first-time-right analog designs. It talks about what impact the choice of process architecture makes, and discusses the pros and cons of different process architectures including SOI and BCD.


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Published: September 2013

At the moment the miniaturisation of integrated circuits for consumer electronics means to decrease the size of Cu interconnects below 100 nm, while a lifetime of 3–5 years has to be guaranteed. For industrial and automotive applications wider Al interconnects (~350 nm) are used, but an extreme low rate of failures (0.1 ppm) has to be reached to produce reliable end-products including dozens of components. A further progress in the development of high-end electronics and more complex industrial products needs a better prediction of possible failure mechanism and the related time to failure of the chosen technology. This investigation is focused on migration induced void formation and combines the results of process simulations, for the back end of line, (intrinsic pre-stress) with the dynamic simulation of the migration induced material movement in the interconnects.


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Published: September 2013

Highly robust metallizations m ICs for high temperature and high current applications are needed. Special thick metal layers often known as "power metals" are added to achieve a higher current capability. But these metallizations suffer from reliability limitations as well.


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Published: July 2013

Robust metallizations for harsh environment and high current applications in integrated circuits are required for automotive or industrial applications. To achieve a higher current capability so called ‘‘power metals’’ are used. The new concept of slotted geometries shows a better robustness towards degradation due to electromigration.


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Published: July 2013

For most devices sitting on SOI wafer, there is a consideration of backside coupling effect. This phenomenon becomes catastrophic if the device sits on the SOI wafer is an IGBT which consists n-p-n-p structure and employs both the partial SOI and DTI technique. Earlier leakage had been found during development of 200V superjunction lateral IGBT (SJ LIGBT) on partial SOI.


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Published: July 2013

XDH10 is X-Fab´s dielectric trench insulated smart power technology. Main target applications are analog switch ICs, driver ICs for capacitive, inductive and resistive loads and EL / piezo driver ICs for applications using 220V net supply. The typical breakdown voltage of the HV DMOS devices is >350V or >650V. The modular process combines DMOS, bipolar and CMOS processing steps that are compatible with dielectric insulation to provide a wide variety of MOS and bipolar devices with different voltage levels within a dielectric bi-directional high voltage trench insulation on the same die.


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Published: June 2013

Lifetime determination is one of the reliability key tasks to have an accurate estimation of the period of time that can still survive with a certain confidence level under the specific operating conditions to perform the respective function of the applications. Various reliability tests have been designed to reveal and assess the respective wear-out degradation mechanisms.


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Published: May 2013

What happens when optical signals are converted to electrical signals? Focusing on the optical to electrical conversion process, this webinar sheds some light on the basics of light interaction from reflection, transmission, polarization and refraction to absorption with semiconductors devices. It explores electrical fields, recombination and lifetime, doping profiles, band structures and pn-junctions to determine what happens when light has been converted into electron-hole pairs. This webinar provides a solid overview of passive and active optical sensor elements manufactured in a mixed-signal CMOS process or added during post processing


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Published: May 2013

The filters are constituted by a Fabry-Perot resonator formed by two Bragg mirrors separated by a patterned cavity. The filter response can be tuned by changing the geometric parameters of the patterning, and consequently the cavity effective refractive index. In this way, many different filters can be produced at once on a single chip, allowing multichanneling. The filter has been designed, produced, and characterized. The results for a chip with 24 filters are presented.


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