adrvc03 *
Driver
X-FAB
0.35 μm
XH035
PT
Schematic Layout Analog Library
XH035: A_CELLS_HV. For MOS module only. adrvc03 is a driver circuit for external loads (realys, LEDs, etc). The circuit features NMOS open-drain output (low-side switch). The layout of adrvc03 makes it easy to incorporate in the flat IO ring.
DPIN *
Integrated Photodiode
X-FAB
0.60 µm
XB06
PT
Schematic Layout Analog Library
XB06: OEIC Building Block Library. DPIN_5050 and DPIN_50100 are fast photodiodes with a vertical PIN structure optimized forred light (660nm).
LNA1 *
LNA
X-FAB
0.60 µm
XB06
PT
Schematic Layout Analog Library
XB06: LNA library: RF_LNA_CELLS. LNA 1 is a low noise amplifier. It shoud be biased by the RF bias cell.
LNA2 *
LNA
X-FAB
0.60 µm
XB06
PT
Schematic Layout Analog Library
XB06: LNA library: RF_LNA_CELLS. LNA2 is a low noise amplifier. It should be biased by the RF bias cell
LNA3 *
LNA
X-FAB
0.60 µm
XB06
PT
Schematic Layout Analog Library
XB06: LNA library: RF_LNA_CELLS. LNA3 is a low noise amplifier with on-chip inductor. It should be biased by the RF bias cell.
LNA1 *
LNA
X-FAB
0.35 μm
XH035
PT
Schematic Layout Analog Library
XH035: LNA Library: RF_LNA_CELLS. LNA1 is a broadband low noise amplifier. It should be bieased by the RF bias cell.
LNA2 *
LNA
X-FAB
0.35 μm
XH035
PT
Schematic Layout Analog Library
XH035: LNA Library: RF_LNA_CELLS. LNA2 is a narrowband low noise amplifier. It should be biased by the RF bias cell.
Sub 1dB LNA+mixer
LNA Mixer
Saul Research
0.35 μm
XH035
PT
GDSII Schematic
LNA and optional mixer based on XH035 process. Measured noise figure below 1dB including mixer. Described in a paper on the web site. The techniques are readily applied to other processes.
IPMS_430
Microprocessor Soft IP
Fraunhofer IPMS
All Geometries
All Processes
PT
VHDL
16 Bit Microcontroller
The core IPMS_430 is compatible in its properties, like instruction set, address space and time behavior with the standard CPU MSP430 from TI. Important features are
- 16 bit Risc CPU
- 7 address modes for source operands
- 4 a
IPMS_16CXX
Microprocessor Soft IP
Fraunhofer IPMS
All Geometries
All Processes
PT
VHDL
8 Bit Microprocessor.
The core IPMS_16CXX realizes a to the PIC 16CXX-family of the firm Microchip compatible 8-bit microcontroller Important features are:
- 8-bit arithmetic (addition, subtraction, logical operations, bit manipulation)
- to 64 k i
atmpc02 *
Miscellaneous
X-FAB
1.00 µm
XC10
PT
Analog Library Layout Schematic
XC10: A_CELLS; A_CELLS_M1. atmpc02 is a high-temperature detector. An OVERT output signal (active low) is generated when the chip temperature rises above 160 °C (approx.).
atmpc01 *
Miscellaneous
X-FAB
1.00 µm
XC10
PT
Analog Library Layout Schematic
XC10: A_CELLS; A_CELLS_M1. atmpc01 is a high-temperature detector. An OVERT output signal (active low) is generated when the chip temperature rises above 140 °C (approx.).
MIXER *
Mixer
X-FAB
0.60 µm
XB06
PT
Schematic Layout Analog Library
XB06: LNA library: RF_MIXER_CELLS. MIXER is a down conversion mixer based on a Gilbert cell topology. It should be biased by the RF bias cell.
aopac01 *
Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Schematic Layout Analog Library
XC10: A_CELLS; A_CELLS_M1. aopac01 is an internally compensated general purpose OpAmp with P-MOS input and common-source output stage.
aopac02 *
Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Analog Library Layout Schematic
XC10: A_CELLS; A_CELLS_M1. aopac02 is an internally compensated rail-to-rail input/output OpAmp.
aopac03 *
Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Analog Library Layout Schematic
XC10: A_CELLS; A_CELLS_M1. aopac03 is an internally compensated general purpose OpAmp with N-MOS input and bipolar pnp output stage.
aopac04 *
Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Analog Library Layout Schematic
XC10: A_CELLS; A_CELLS_M1. aopac04 is a internally compensated general purpose OpAmp with P-MOS input stage.
aopac05 *
Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Analog Library Layout Schematic
XC10: A_CELLS; A_CELLS_M1. aopac05 is a fast internally compensated OpAmp with P-MOS input stage.
aopac06 *
Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Analog Library Layout Schematic
XC10: A_CELLS; A_CELLS_M1. aopac06 is a high-gain, high load current CMOS OpAmp with N-MOS input and rail-to-trail output stage.
aopac07 *
Operational Amplifier
X-FAB
1.00 µm
XC10
PT
Analog Library Layout Schematic
XC10: A_CELLS; A_CELLS_M1. aopac07 is a general purpose internally compensated OpAmp with P-MOS input and source follower output stage.
aopac01 *
Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Schematic Layout Analog Library
XB06: A_CELLS. aopac01 is a low power internal frequency-compensated CMOS operational amplifier with pmos input stage
aopac02 *
Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout Schematic Analog Library
XB06: A_CELLS. aopac02 is an internal frequency-compensated CMOS operational amplifier with p-mos input stage
aopac03 *
Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout Schematic Analog Library
XB06: A_CELLS. aopac03 is a fast internal frequency-compensated CMOS operational amplifier with p-mos input stage
aopac05 *
Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout Schematic Analog Library
XB06: A_CELLS. aopac05 is a low power internal frequency-compensated CMOS operational amplifier with nmos input stage
aopac06 *
Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout Schematic Analog Library
XB06: A_CELLS. aopac06 is an internal frequency-compensated CMOS operational amplifier with n-mos input stage
aopac07 *
Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout Schematic Analog Library
XB06: A_CELLS. aopac07 is a fast internal frequency-compensated CMOS operational amplifier with n-mos input stage.
aopac09 *
Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout Schematic Analog Library
XB06: A_CELLS. aopac09 is an internal frequency-compensated CMOS operational amplifier with p-mos input stage and rail-to-rail output stage.
aopac10 *
Operational Amplifier
X-FAB
0.60 µm
XB06
PT
Layout Schematic Analog Library
XB06: A_CELLS. aopac10 is an internal frequency-compensated CMOS operational amplifier with rail-to-rail input stage and rail-to-rail output stage.
aopac13 *
Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Layout Schematic Analog Library
XC06: A_CELLS_HV. aopac13 is a high-voltage (VDD up to 10V), low-power, internally-compensated CMOS OpAmp with PMOS input stage.
aopac14 *
Operational Amplifier
X-FAB
0.60 µm
XC06
PT
Schematic Layout Analog Library
XC06: A_CELLS_HV. aopac14 is a high-voltage (VDD up to 10V), low-power, internally-compensated CMOS OpAmp with NMOS input stage.